SLLU325 July 2020 – MONTH ISO6720-Q1 , ISO6721 , ISO6721-Q1
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This user’s guide describes EVM operation with respect to the ISO672x dual-channel digital isolators. However, the EVM may be reconfigured for evaluation of any of TI’s dual-channel digital isolators in an 8-pin SOIC package. This guide also describes the available channel configurations within the ISO6721 family, the EVM schematic, and typical laboratory setup. A typical input and output waveform is also presented.
The ISO672x is TI’s new digital isolator family capable of galvanic isolations up to 3000 VRMS. These isolators provide high electromagnetic immunity and low emissions at low power consumption, while isolating CMOS or LVCMOS digital I/Os. The ISO672x digital isolators have logic input and output buffers separated by a silicon oxide (SiO2) insulation barrier. Used with isolated power supplies, these devices block high voltages, isolate grounds, and prevent noise currents on a data bus or other circuits from entering the local ground and interfering with, or damaging sensitive circuitry.
Figure 3-1 shows the ISO672x dual-channel digital isolator pin configurations.