In today's communication equipment and enterprise markets, power requirements are ever increasing to meet the demands of evolving SoCs and FPGAs. This trend has pushed DC/DC buck switching regulators and power stages to be both rated for higher power and placed in greater density in limited board space. DC/DC regulators naturally generate heat due to power losses during conversion. Operating in environments with high ambient temperatures such as active antennae systems, baseband units, or small cell base stations, an also cause unavoidable thermal rise within the device as well. Buck converters and power stages must stay within a junction temperature range, rated by the vendor, in order to stay within the safe operating area (SOA) and prevent heating up neighboring devices. As device junction temperature rises with ambient temperature, the amount of current a given device can safely output decreases. This poses significant constraints for systems where high ambient temperatures are unavoidable but power requirements are high. It is, therefore, imperative to optimize heat dissipation in order to lessen thermal constraints and increase overall system efficiency.
This technical white paper covers common known methods of heat dissipation, what a Thermally Enhanced Package (TEP) is, and how TEP can improve heat dissipation with little to no drawbacks. Discussion will be on how heat is dissipated through existing packages, how PCB layout affects thermal dissipation, and how TEP can unlock a new way for heat to be dissipated from the IC.