The TLV62569 device is a synchronous step-down buck DC-DC converter optimized for high efficiency and compact solution size. The device integrates switches capable of delivering an output current up to 2 A.
At medium to heavy loads, the device operates in pulse width modulation (PWM) mode with 1.5-MHz switching frequency. At light load, the device automatically enters Power Save Mode (PSM) to maintain high efficiency over the entire load current range. In shutdown, the current consumption is reduced to less than 2 μA.
The TLV62569 provides an adjustable output voltage via an external resistor divider. An internal soft start circuit limits the inrush current during startup. Other features like over current protection, thermal shutdown protection and power good are built-in. The device is available in a SOT23 and SOT563 package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TLV62569DBV | SOT23 (5) | 2.90 mm × 2.80 mm |
TLV62569PDDC | SOT23 (6) | |
TLV62569DRL | SOT563 (6) | 1.60 mm x 1.60 mm |
TLV62569PDRL | SOT563 (6) |
PART NUMBER | FUNCTION | MARKING SYMBOL |
---|---|---|
TLV62569DBV | - | 16AF |
TLV62569PDDC | Power Good | 7G |
TLV62569DRL | - | 19D |
TLV62569PDRL | Power Good | 19E |
Changes from B Revision (July 2017) to C Revision
Changes from A Revision (March 2017) to B Revision
Changes from * Revision (December 2016) to A Revision
PIN NUMBER | I/O/PWR | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | SOT23-5 | SOT23-6 | SOT563-6 | ||
EN | 1 | 1 | 5 | I | Device enable logic input. Logic high enables the device, logic low disables the device and turns it into shutdown. Do not leave floating. |
GND | 2 | 2 | 2 | PWR | Ground pin. |
SW | 3 | 3 | 4 | PWR | Switch pin connected to the internal FET switches and inductor terminal. Connect the inductor of the output filter to this pin. |
VIN | 4 | 4 | 3 | PWR | Power supply voltage input. |
PG | - | 5 | 6 | O | Power good open drain output pin for TLV62569P. The pull-up resistor should not be connected to any voltage higher than 5.5V. If it's not used, leave the pin floating. |
FB | 5 | 6 | 1 | I | Feedback pin for the internal control loop. Connect this pin to an external feedback divider. |
NC | - | - | 6 | O | No connection pin for TLV62569DRL. The pin can be connected to the output or the ground. Or leave it floating. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage(2) | VIN, EN, PG | –0.3 | 6 | V |
SW (DC) | –0.3 | VIN+0.3 | V | |
SW (AC, less than 10ns)(3) | –3.0 | 9 | V | |
FB | –0.3 | 5.5 | V | |
Operating junction temperature, TJ | –40 | 150 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 | V |
MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | Input voltage | 2.5 | 5.5 | V | |
VOUT | Output voltage | 0.6 | VIN | V | |
IOUT | Output current | 0 | 2 | A | |
TJ | Operating junction temperature | –40 | 125 | °C | |
ISINK_PG | Sink current at PG pin | 1 | mA |
THERMAL METRIC(1) | DBV (5 Pins) |
DDC (6 Pins) |
DRL (6 Pins) |
UNIT | |
---|---|---|---|---|---|
RθJA | Junction-to-ambient thermal resistance | 188.2 | 106.2 | 146.3 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 137.5 | 52.9 | 51.0 | °C/W |
RθJB | Junction-to-board thermal resistance | 41.2 | 31.2 | 27.0 | °C/W |
ψJT | Junction-to-top characterization parameter | 31.4 | 11.3 | 2.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 40.6 | 31.6 | 27.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | n/a | n/a | n/a | °C/W |