SLVSFO5D April   2020  – January 2023 TLV841

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (VDD)
        1. 8.3.1.1 VDD Hysteresis
        2. 8.3.1.2 VDD Transient Immunity
      2. 8.3.2 SENSE Input (TLV841S)
        1. 8.3.2.1 SENSE Hysteresis
        2. 8.3.2.2 Immunity to SENSE Pin Voltage Transients
      3. 8.3.3 User-Programmable Reset Time Delay for TLV841C only
      4. 8.3.4 Manual Reset (MR) Input for TLV841M only
      5. 8.3.5 Output Logic
        1. 8.3.5.1 RESET Output, Active-Low
        2. 8.3.5.2 RESET Output, Active-High
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD > VPOR)
      2. 8.4.2 Below Power-On-Reset (VDD < VPOR)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves: TLV841EVM
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

1 Features

Designed for high performance:

  • Nano quiescent current: 125 nA (typical)
  • High threshold accuracy: ±0.5% (typical)
  • Built-in precision hysteresis (VHYS): 5% (typical)

Designed for a wide range of applications:

  • Operating voltage range: 0.7 V to 5.5 V
  • Adjustable threshold voltage: 0.505 V (typical)
  • Fixed (VIT-) voltage: 0.8 V to 4.9 V in 0.1 V steps
  • Separate SENSE pin (TLV841S)
  • Active-low manual reset (MR) (TLV841M)
  • Push-button monitoring for TLV841 (S/M variants)
  • Reset time delay (tD): Capacitor-based programmable (TLV841C)
    • Min time delay: 40 µs (typical) without capacitor
  • Reset time delay (tD): Fixed time delay options (TLV841M and TLV841S)
    • 40 μs, 2 ms, 10 ms, 30 ms, 50 ms, 80 ms,
      100 ms, 150 ms, 200 ms
  • Temperature range: –40°C to +125°C

Multiple output topologies, package type:

  • TLV841xxDL: open-drain, active-low (RESET)
  • TLV841xxPL: push-pull, active-low (RESET)
  • TLV841xxDH: open-drain, active-high (RESET)
  • TLV841xxPH: push-pull, active-high (RESET)
  • Package: 0.73-mm x 0.73-mm DSBGA