SLVUCM6
March 2024
TPS65219-Q1
1
Abstract
Trademarks
1
Introduction
2
PDN and Sequence Diagrams
2.1
TPS6521923W-Q1 Sequence and Power Block Diagram
3
EEPROM Device Settings
3.1
Device ID
3.2
Enable Settings
3.3
Regulator Voltage Settings
3.4
Sequence Settings
3.4.1
Power-Up Sequence
3.4.2
Power-Down Sequence
3.5
EN / PB / VSENSE Settings
3.6
Multi-Function Pin Settings
3.7
Over-Current Deglitch
3.8
Mask Settings
3.9
Discharge Check
3.10
Multi PMIC Config
Technical Reference Manual
TPS6521923W-Q1
Technical Reference Manual