SNOAA61A October 2020 – February 2021 LMG3422R030 , LMG3422R050 , LMG3425R030 , LMG3425R050
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High-voltage (> 600 V) gallium nitride (GaN) high-electron-mobility transistors (HEMTs) are replacing their silicon (Si)-based counterparts in fast-charging adapters, data centers, telecommunications, electric vehicles, and other applications where the need for high-density, high-efficiency power system becomes pressing and prevalent, see GaN drives energy efficiency to the next level. Due to the reduction or removal of lead induced parasitics, surface-mount type packages are more suitable than through-hole types (e.g., TO-247) for GaN HEMT devices to exploit their use in power switching applications. Texas Instruments (TI) has implemented a direct-drive GaN solution by co-packaging a high-voltage GaN transistor and its driver with an integrated protection into one quad flat no-lead (QFN) package, see Direct-drive configuration for GaN devices. The fully released LMG341x product family uses the same QFN 8x8 (i.e., 8-mm x 8-mm footprint) package for devices of 150-, 70-, and 50-mΩ on-resistance, see Gallium nitride (GaN) ICs – Products. Enabled by this surface-mount packaging solution, TI’s GaN transistor with its integrated driver not only eliminates common-source inductance and significantly reduces gate-loop inductance, but also allows the built-in functions of thermal and current protections, see Optimizing GaN performance with an integrated driver. However, the power dissipation capability of these products is limited because of the small exposed thermal pad area and package size. To address the rising need for high power applications such as 4-kW power supply units for server and telecom, a new QFN 12x12 package has been developed for TI’s next-generation integrated GaN power stages (LMG342x). This application report documents the thermal performance of this new package.
The newly developed QFN 12x12 is a low-profile, leadless surface-mount package with an exposed copper (Cu) thermal pad and functional pins on the package bottom surface shown in Figure 2-1. It maintains the same electrical merits and functional integrations as the prior QFN 8x8 package solution used for TI’s 600-V GaN power stage products. The improved package thermal design enables a high level of power dissipation and is implemented in this updated QFN 12x12 configuration.
Figure 2-2 shows the QFN 12x12 package that has a 3x larger thermal pad area and the same creepage distance of 2.75 mm between the center thermal pad (tied to source internally) and bottom drain terminal pins compared to the preceding QFN 8x8 version. Table 2-1 compares the footprint and thermal pad area among TI’s QFN and other popular surface-mount packages; TO Lead-Less (TOLL) and D2PAK that are used for high-voltage GaN or silicon carbide (SiC) discrete devices. TI’s QFN 12x12 has the largest exposed thermal pad area of 79mm2 in comparison with competitors’ packages. Although occupying more real estate on the printed circuit board (PCB) than the TOLL package, it possesses a greater effective area that can be used for heat dissipation through a bottom-side cooling system by showing 7% more thermal pad area over PCB footprint ratio.
MANUFACTURER | TI | TI | COMPETITOR A | COMPETITOR B |
---|---|---|---|---|
PACKAGE | QFN 8x8 | QFN 12x12 | TOLL 1 | D2PAK 2 |
Minimum footprint on PCB (mm2) | 64 | 144 | 116 | 165 |
Exposed thermal pad area (mm2) | 23 | 79 | 56 | 45 |
Thermal pad area / PCB footprint (%) | 36 | 55 | 48 | 27 |