The LM3478 is a low side N-Channel controller for switching regulators. Like many switching controllers, the added flexibility in component selection can cause problems for users when determining the compensation scheme. It is the goal of this application report to present a decent groundwork to allow the reader to select with confidence the correct compensation components. To achieve this we look at the small signal models for the feedback loop to determine how each component interacts and eventually calculate the desired compensation.
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The first question that is often asked is: Why is compensation necessary? Any DC-DC converter that regulates the output voltage utilizes negative feedback to ensure accuracy across line and load changes. An incorrect compensation scheme could lead to a phase reversal of the loop causing positive feedback and an erratic uncontrolled output. A minor problem that is typically encountered is an over or under-damped response of the output when a load transient is experienced. This is a sign that the loop stability could be optimized.
Before compensation components can be selected and the response measured, the first step to undertake is to understand the operation of the controller and feedback loops. It is assumed that you are already familiar with the basic operation of the switcher covered in LM3478 High-Efficiency Low-Side N-Channel Controller for Switching Regulator. Examining the block diagram of the LM3478 boost regulator in Figure 1-1, it can be clearly seen that two feedback loops exist. This is a unique feature that is indicative of a current mode control switching regulator.
The first loop is the output voltage loop created by VOUT passing through the resistor divider into an error amplifier. The output of the error amplifier is referred to as the control voltage, VC, which is one of the two inputs to the PWM comparator.
The other input to the comparator is the second feedback loop. With current mode control architecture the switch current is sensed and is used to determine, in conjunction with the control voltage, when the FET should be turned off. To achieve this the switch current is measured across the external sense resistor before being summed with an internal ramp. The slope compensation ramp is present to prevent a large signal stability issue that is inherent in current mode control. While this ramp voltage is included in our small signal models, its requirement and adjustment will not be discussed here. For more information about the slope compensation, please consult the LM3478 data sheet.
Figure 1-1 shows the overall block diagram of the LM3478 with its application circuit. The next step is to derive the small signal equation for the entire loop. To simplify the analysis the loop can be effectively divided into three separate parts. The first transfer function that will be examined is the control voltage, VC, to the output voltage, VOUT. This takes into account the effects of the current loop, switch, and the output filter stage such as the inductor and output capacitor.
The equation can be written as:
At first inspection the equation consists of two zeros, one of which is in the right half plane, a single pole and a complex pole pair. The DC gain of the system is written ACM and can be calculated by the equation:
where
and
and
and
This is a rather long formula that incorporates the slope compensation and the inductor into the equation. It has been provided for completeness, however in this analysis the equation has been reduced to a simpler and more manageable form. You will find this simplification works extremely well and no real noticeable difference will be seen in the analysis. Therefore for all LM3478 compensation calculations this equation should be used:
The next step is to calculate the two zeros that were found in the control to output equation. The first zero is created by the output capacitor and its associated equivalent series resistance:
The second zero is actually a right half plane zero. When examining its response on a bode plot it has the effect of increasing the gain by 20dB/decade like a left hand plane zero, but causing a 90 degree drop in phase like a pole. Its occurrence can be related to the application circuit by thinking of the response of the output voltage. If the output voltage starts dropping the switch will turn on to increase the current through the inductor. This causes the output voltage to drop even lower since the output current is provided solely by the output capacitor during this time. It is this effect that can be thought of as the source of the right half plane zero, which explains why it does not occur in a buck converter.
Looking at the denominator of the equation the poles can be calculated. The first pole is from the output capacitor and the load resistance and can be expressed as:
The complex pole pair occurs at half the switching frequency and will be simply attributed to sampling theory for the sake of length in this application note. A Q factor also appears that can be calculated based on the inductor current slopes and duty-cycle:
ωs = 2 x π x fs
This completes the equation of the control to output transfer function. The second stage that needs to be analyzed is the error amplifier. Of particular interest, we will derive the transfer function from the feedback pin to the control voltage. To achieve this, the error amplifier block diagram has been converted to a small signal model.
As can be seen, the LM3478 uses a gm amplifier for the error amplifier. With this model the equation can be written by inspection as:
The DC gain of the system AEA is simply the output conductance multiplied by the output resistance of the amplifier. These values can be found in the electrical characteristics table of the datasheet.
The single zero is formed by the two external compensation components that are added at the COMP pin of the LM3478, the capacitor and resistor.
The error amplifier pole is formed by the combination of the output resistance of the error amplifier and the external compensation capacitor. An additional pole can be added with the introduction of another capacitor CC2 in parallel. However, for most power supplies this is not necessary.
The last transfer function that needs to be derived in the loop is from the output voltage, VOUT, to the feedback pin. This can be calculated by inspection and is simply a voltage divider, caused by the feedback resistors. This can be written as a combination of the resistors or the output voltage and feedback voltage for convenience
Now that the transfer function for the separate circuits has been calculated the loop gain can be calculated by multiplication of these functions. We can then express the total loop gain as T:
The DC gain of the system is also a result of the product of DC terms in the three transfer functions and can be calculated by the equation: