LMR23610-Q1 SIMPLE SWITCHER® 36 V, 1 A Synchronous Step-Down Converter

1 Features

Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: -40 °C to 125 °C Ambient Operating Temperature Range
- Device HBM ESD Classification Level H1C
- Device CDM ESD Classification Level C4A
4 V to 36 V Input Range
1 A Continuous Output Current
Integrated Synchronous Rectification
Current Mode Control
Minimum Switch-On Time: 60 ns
Internal Compensation for Ease of Use
400 kHz Switching Frequency With PFM Mode
Frequency Synchronization to External Clock
75 µA Quiescent Current at No Load
Soft-Start into a Pre-Biased Load
High Duty Cycle Operation Supported
Output Short-Circuit Protection with Hiccup Mode
8-Pin HSOIC with PowerPAD™ Package Options
Create a Custom Design Using the LMR23610-Q1 With the WEBENCH® Power Designer

2 Applications

Automotive Battery Regulation
Industrial Power Supplies
Telecom and Datacom Systems
General Purpose Wide Vin Regulation

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3 Description

The LMR23610-Q1 SIMPLE SWITCHER® is an easy to use 36 V, 1 A synchronous step down regulator. With a wide input range from 4 V to 36 V, it is suitable for various applications from industrial to automotive for power conditioning from unregulated sources. Peak current mode control is employed to achieve simple control loop compensation and cycle-by-cycle current limiting. A quiescent current of 75 µA makes it suitable for battery powered systems. Internal loop compensation means that the user is free from the tedious task of loop compensation design. This also minimizes the external components. An extended family is available in 1.5 A (LMR23615-Q1), 2.5 A (LMR23625-Q1) and 3 A (LMR23630-Q1) load current options in pin-to-pin compatible packages which allows simple, optimum PCB layout. A precision enable input allows simplification of regulator control and system power sequencing. Protection features include cycle-by-cycle current limit, hiccup mode short circuit protection and thermal shutdown due to excessive power dissipation.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
LMR23610AQDDARQ1	HSOIC (8)	4.9 mm x 3.9 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

Efficiency vs Load, V_IN = 12 V

LMR23610-Q1 D000_page_1_efficiency_v_current_SNVSAH3.gif

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from * Revision (December 2016) to A Revision

Changed the value for HBM from ±2500 to ±2000Go

5 Pin Configuration and Functions

DDA Package

8-Pin HSOIC

Top View

Pin Functions

PIN		I/O ⁽¹⁾	DESCRIPTION
NAME	NO.	I/O ⁽¹⁾	DESCRIPTION
SW	1	P	Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor.
BOOT	2	P	Boot-strap capacitor connection for high-side driver. Connect a high quality 100 nF capacitor from BOOT to SW.
VCC	3	P	Internal bias supply output for bypassing. Connect a 2.2 μF/ 16 V or higher capacitance bypass capacitor from this pin to AGND. Do not connect external loading to this pin. Never short this pin to ground during operation.
FB	4	A	Feedback input to regulator, connect the feedback resistor divider tap to this pin.
EN/SYNC	5	A	Enable input to regulator. High = On, Low = Off. Can be connected to VIN. Do not float. Adjust the input under voltage lockout with two resistors. The internal oscillator can be synchronized to an external clock by coupling a positive pulse into this pin through a small coupling capacitor. See Enable/Sync for detail.
AGND	6	G	Analog ground pin. Ground reference for internal references and logic. Connect to system ground.
VIN	7	P	Input supply voltage.
PGND	8	G	Power ground pin, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of C_IN and C_OUT. Path to C_IN must be as short as possible.
PAD	9	G	Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB.

(1) A = Analog, P = Power, G = Ground

6 Specifications

6.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range of -40 °C to 125 °C (unless otherwise noted) ⁽¹⁾

PARAMETER		MIN	MAX	UNIT
Input Voltages	VIN to PGND	-0.3	42	V
	EN/SYNC to AGND	-5.5	VIN + 0.3
	FB to AGND	-0.3	4.5
	AGND to PGND	-0.3	0.3
Output Voltages	SW to PGND	-1	VIN + 0.3	V
	SW to PGND less than 10 ns transients	-5	42
	BOOT to SW	-0.3	5.5
	VCC to AGND	-0.3	4.5 ⁽²⁾
T_J	Junction temperature	-40	150	°C
T_stg	Storage temperature	-65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) In shutdown mode, the VCC to AGND maximum value is 5.25 V.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM) ⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM)	±1000	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over the recommended operating junction temperature range of -40 °C to 125 °C (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Input Voltage	VIN	4	36	V
	EN/SYNC	-5	36
	FB	-0.3	1.2
Output Voltage	V_OUT	1	28	V
Output Current	I_OUT	0	1	A
Temperature	Operating junction temperature, T_J	-40	125	°C

(1) Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC ⁽¹⁾ ⁽²⁾		DDA (8 PINS)	UNIT
R_θJA	Junction-to-ambient thermal resistance	42.0	°C/W
ψ_JT	Junction-to-top characterization parameter	5.9
ψ_JB	Junction-to-board characterization parameter	23.4
R_θJC(top)	Junction-to-case (top) thermal resistance	45.8
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	3.6
R_θJB	Junction-to-board thermal resistance	23.4

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

(2) Power rating at a specific ambient temperature T_A should be determined with a maximum junction temperature (T_J) of 125 °C, which is illustrated in Recommended Operating Conditions section.

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (T_J) range of -40 °C to +125 °C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25 °C, and are provided for reference purposes only.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLY (VIN PIN)
V_IN	Operation input voltage		4		36	V
VIN_UVLO	Under voltage lockout thresholds	Rising threshold	3.3	3.7	3.9	V
VIN_UVLO	Under voltage lockout thresholds	Falling threshold	2.9	3.3	3.5	V
I_SHDN	Shutdown supply current	V_EN = 0 V, V_IN = 12 V, T_J = -40 °C to 125 °C		2.0	4.0	μA
I_Q	Operating quiescent current (non- switching)	V_IN =12 V, V_FB = 1.1 V, T_J = -40 °C to 125 °C, PFM mode		75		μA
ENABLE (EN PIN)
V_{EN_H}	Enable rising threshold Voltage		1.4	1.55	1.7	V
V_{EN_HYS}	Enable hysteresis voltage			0.4		V
V_WAKE	Wake-up threshold		0.4			V
I_EN	Input leakage current at EN pin	V_IN = 4 V to 36 V, V_EN= 2 V		10	100	nA
I_EN	Input leakage current at EN pin	V_IN = 4 V to 36 V, V_EN= 36 V			1	μA
VOLTAGE REFERENCE (FB PIN)
V_REF	Reference voltage	V_IN = 4 V to 36 V, T_J = 25 °C	0.985	1.0	1.015	V
V_REF	Reference voltage	V_IN = 4 V to 36 V, T_J = -40 °C to 125 °C	0.980	1.0	1.020	V
I_{LKG_FB}	Input leakage current at FB pin	V_FB= 1 V		10		nA
INTERNAL LDO (VCC PIN)
V_CC	Internal LDO output voltage			4.1		V
VCC_UVLO	VCC under voltage lockout thresholds	Rising threshold	2.8	3.2	3.6	V
VCC_UVLO	VCC under voltage lockout thresholds	Falling threshold	2.4	2.8	3.2	V
CURRENT LIMIT
I_{HS_LIMIT}	Peak inductor current limit		1.4	2.0	2.6	A
I_{LS_LIMIT}	Valley inductor current limit		1.0	1.5	2.1	A
I_{L_ZC}	Zero cross current limit			-0.04		A
INTEGRATED MOSFETS
R_{DS_ON_HS}	High-side MOSFET ON-resistance	V_IN = 12 V, I_OUT = 1 A		185		mΩ
R_{DS_ON_LS}	Low-side MOSFET ON-resistance	V_IN = 12 V, I_OUT = 1 A		105		mΩ
THERMAL SHUTDOWN
T_SHDN	Thermal shutdown threshold		162	170	178	°C
T_HYS	Hysteresis			15		°C

6.6 Timing Characteristics

Over the recommended operating junction temperature range of -40 °C to 125 °C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
HICCUP MODE
N_OC⁽¹⁾	Number of cycles that LS current limit is tripped to enter Hiccup mode			64		Cycles
T_OC	Hiccup retry delay time			5		ms
SOFT START
T_SS	Internal soft-start time	The time of internal reference to increase from 0 V to 1.0 V	1	2	3	ms

(1) Guaranteed by design.

6.7 Switching Characteristics

Over the recommended operating junction temperature range of -40 °C to 125 °C (unless otherwise noted)

PARAMETER		MIN	TYP	MAX	UNIT
SW (SW PIN)
f_SW	Default switching frequency	340	400	460	kHz
T_{ON_MIN}	Minimum turn-on time		60	90	ns
T_{OFF_MIN}⁽¹⁾	Minimum turn-off time		100		ns
SYNC (EN/SYNC PIN)
f_SYNC	SYNC frequency range	200		2200	kHz
V_SYNC	Amplitude of SYNC clock AC signal (measured at SYNC pin)	2.8		5.5	V
T_{SYNC_MIN}	Minimum sync clock ON and OFF time		100		ns