LM76005QEVM User’s Guide
1 LM76005QEVM User’s Guide
The Texas Instruments LM76005QEVM evaluation modules (EVM) help designers evaluate the operation and performance of the LM76005-Q1 wide-input voltage buck regulator. The output voltage for the device offers configurability from 1-V to 95% of VIN, synchronous rectification, PFM, and forced PWM mode and a 200-kHz to 500-kHz adjustable frequency range with a 400-kHz default frequency. It also offers external frequency synchronization, power-good (PG) flag, and a precision enable to program undervoltage lockout (UVLO) and internal compensation. Built-in protection includes current limit, overvoltage and undervoltage protection, and thermal shutdown. The LM76005QEVM is configured for an output voltage of 3.3 V and a switching frequency of 400 kHz. Refer to the LM76005-Q1 3.5-V to 60-V, 5-A Synchronous Step-Down Voltage Regulator Data Sheet for additional features, detailed description, and available options.
The EVM contains one DC-DC converter (see Table 1-1).
| CONVERTER | IC | PACKAGE |
|---|---|---|
| U1 | LM76005-Q1 | (RNP) WQFN-30 |
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2 Setup
This section describes the test points and connectors on the EVM and how to properly connect, set up, and use the LM76005QEVM. Refer to Figure 2-1 for a top view of the EVM and relative placement of the different test points and connectors.
Figure 2-1 Top View of LM76005QEVM2.1 Input/Output (I/O) Connector Description
- VIN – Terminal on J1The power input terminal for the converter
- VOUT – Terminal on J2The regulated output voltage for the converter
- VIN_EMI – Terminal on J6Used to supply the input voltage through an on board LC filter (if one is needed for conducted
EMI/EMC measurement). The L1 and CBULK component
pads are located on the bottom side of the EVM.
Refer to Figure 3-1 for initial suggestion of
component values. J6 and LC filter are not
populated on this EVM.
- GND – Terminal on J1, J2 and J6The ground reference for the converter
- EN – TestpointUsed to enable the converter by supplying a voltage greater than 1.2 V (typ) or just to monitor the voltage on this pin whenever a resistor divider is in place (for precision enable applications). The regulator is enabled when VIN > 3.5 V. This threshold can be calculated by:
- PG – TestpointUsed to monitor the power-good flag. This flag indicates whether the output voltage has reached its regulation point. This pin is an open-drain output that requires a pullup resistor to the appropriate logic voltage (any voltage less than 20 V).
- PG_PU – TestpointThe top connection of an optional 100-kΩ pullup resistor that ties directly to the open-drain PG
pin. Supply an appropriate voltage to this test point, or tie it directly to
the VOUT test point to observe the PG flag operation if the output voltage
is set less than 20 V.
- SYNC – TestpointThe input terminal for an optional external input clock to the converter as well a mode pin for converter. If used, the external clock frequency must be between 200 kHz and 500 kHz.
