Not all microcontrollers have an integrate DAC on chip, but almost all have the capability to generate PWM signals either with a dedicated peripheral or with a timer module. PWM is a low-cost way to control analog devices (a speaker) with a digital output. PWM emulates an analog signal by means of controlling the duty cycle. Suppose a 100% duty cycle PWM is produced from a 3.3 V MCU, it is easily expected the PWM will produce a 3.3 V DC level signal. A 0% duty cycle PWM is expected to produce a 0 V DC signal as well. What about a 10% duty cycle periodic PWM? If a multimeter is used to measure the PWM output, it is not surprised the multimeter measures 3.3 V * 10% = 0.33 V. A 50% duty cycle PWM will measure 3.3 V * 50% = 1.65 V. This relationship between duty cycle and measured voltage is fairly intuitive. This can be concluded with a simple equation as shown in Equation 1:

Earlier in the Section 1, it was mentioned that each time an analog audio signal is sampled, the signal is recorded as a binary number and the length of the binary numbers is called the resolution. In another word, the resolution expresses the number of discrete steps an analog signal can be represented. If the length of binary numbers is 16, this is denoted as 16-bit resolution. A 16-bit binary value can produce 2¹⁶ = 65536 discrete steps of a signal. Dividing 3.3 V by 65536 is equal to about 50 µV for each step.

Figure 2-1 shows an example analog signal that is digitized with 12 evenly spaced samples at 3-bit resolution. With only 3 bits of resolution, there are only 8 discrete steps. At this resolution, severe quantization error can result which is the difference between the analog signal and the closest available digital value at each sampling instant from the ADC. In Figure 2-1, samples 3, 4 and 5 are converted to the same digital value when they are different in its analog form at the respective sample points.

To recreate the analog signal in Figure 2-1 using PWM, the duty cycle is obtained by dividing the digital value at each sample point by the bit depth which is 2³ = 8.

Figure 2-2 illustrates the reproduction of the analog signal based on the sampling rate and resolution shown in Figure 2-1. Although it resembles the original analog signal but it does not come close to true reproduction. Improvements can be made by increasing the sampling rate and resolution. Imagine the original analog signal was digitized at 8 kHz (8000 samples per second) and 8 bit (256 discrete steps) resolution or higher, the original analog signal will be reproduced by the PWM DAC method at much higher accuracy.

It is understood that a CD quality audio is digitized at a 44.1 kHz sampling rate with 16-bit resolution. The question to then ask is can an MCU achieve this sampling rate and resolution during playback using the PWM DAC method?

To achieve the audio sampling rate during playback, MCU can create a simple timer at the expected frequency. At each timer interrupt, a PWM is generated for the required duty cycle at the desired resolution. This is straight forward for most microcontrollers. Normally the desired sampling rate can be generated by dividing from the timer’s timebase. If the desired sampling rate is integer divisible by the timebase, then the sampling rate can be fully achieved. For sampling rates that are not fully integer divisible, MCU can still reach the desired sampling rate at very high accuracy. Table 3-1 column C shows the achieved sampling rates when the timer uses SYSCLK as the timebase operating at 120 Mhz. As can be seen, for sampling rates at 22.05 kHz and 44.1 kHz, the achieved sampling rates are within 0.00% of the expected. In another word, MCU will be playing back the audio at three decimal points faster than the expected playback speed. For a non-audiophile person, this is not discernible.

To achieve the desired resolution is a different story. For 16-bit resolution, it means there are 2¹⁶ = 65536 discrete steps. In another word, to achieve 16-bit resolution, PWM must be able to vary its duty cycle at the granularity of 1/65536 of a PWM period in order to achieve a 16-bit DAC equivalent. This is evidently not possible as shown in the second column of Table 3-1 where there are only 2721 SYSCLK cycles in a 44.1 kHz PWM period.

The maximum achievable resolution at the respective sampling rate by MCU can be calculated by the equation as shown in Equation 2:

Fifth column shows the maximum achieved resolution at the respective sampling rate. For 44.1 kHz the achieved resolution is 11.41. Like most microcontrollers, TM4C12x MCUs cannot achieve 16-bit resolution using PWM DAC method, but 8-bit audio resolution is certainly achievable.

Sixth and Seventh columns show the minimum timebase frequency that is required to achieve either 16-bit or 8-bit resolution for different desired sample rates.

Table 3-2 shows the analysis for TM4C123x MCU operating at maximum 80 Mhz.

Although it is not possible to achieve 16-bit resolution, it is still possible to generate the equivalent duty cycle ratio at the maximum achievable resolution for MCU by scaling. For example, if the audio file digitizes a sample point with a value of 0x1234 as a 16-bit value at 44.1 kHz sampling rate, the duty cycle ratio is equal to 0x1234 / 0xFFFF = 7.1%. The TM4C129x PWM counter would be configured with 2721 to generate a PWM period that is equal to 44.1 kHz and the match value would be configured to 7.1% x 2721 = 193 to generate the high phase of the duty cycle.

The PWM method is a low-cost way to emulate digital-to-analog conversion for most microcontrollers. For audio applications requiring only 8-bit resolution, PWM DAC method is certainly a viable option. For high quality audio applications, some loss of fidelity is expected.