Amit Benjamin
We all know that new technologies in our life pose great opportunities and possibilities but also new challenges. For example, smartphones and tablets give us 24/7 access to the world around us but also create such dependency that it might be impossible to put them down.
In the same way, advances in chip-level technology help create endless opportunities but also create challenges. With new, smaller process nodes and lower-core voltage rails, we are seeing the benefits of greater integration and higher efficiency. At the same time, it has also created challenges with variations in silicon performance due to corner spread and process variations. To combat these silicon process variations, vendors are specifying power-supply rails with tighter tolerances (See Table 1).
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From a voltage monitoring/supervision perspective, lower supply rails with tighter tolerances pose challenges for system designers, requiring them to protect the data and move the system to a safe mode when FPGAs, ASICs or memory banks are exposed to high voltage spikes.
A typical voltage-monitor integrated circuit (IC) will have wide voltage threshold accuracy, varying hysteresis, poor glitch immunity and no overvoltage detection. These inaccuracies cause reset to occur outside the narrow tolerance band (Figure 1), trigger false resets within the nominal supply range, and create susceptibility to overvoltage and undervoltage transients, which might put the system at risk.
Additionally, more and more safety standards in industrial and automotive applications, such as ISO26262 and ISO61508, require highly accurate voltage monitoring with integrated overvoltage detection.
To address these multiple challenges, TI has developed the TPS3702, an overvoltage and under voltage window comparator with fixed threshold voltages in a small SOT-23-6 package. This high accuracy window comparator provides FPGA designers with benefits including:
To learn more about how to solve these challenges in your next design, check out the TPS3702 or the resources below.
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