This application report describes an IQ dump patch for the CC13xx SimpleLink™ Sub-1 GHz ultra-low power wireless microcontroller (MCU).
Project collateral and source code mentioned in this document can be downloaded from the following link:
http://www.ti.com/lit/zip/swra571. The smartrf_settings.c file is for the CC1310, but similar files can be made for the other CC13x0 and CC13x2 devices, following the steps explained in Section 2.1.1 and Section 2.1.2.
SimpleLink™ and SmartRF™ are trademarks of Texas Instruments.
ARM® and Cortex® are registered trademarks of ARM Limited.
All trademarks are the property of their respective owners.
CC13xx SimpleLink™ Sub-1 GHz ultralow power wireless microcontroller (MCU) is centered around an ARM®Cortex®-M3 (CC13x0) or ARM Cortex-M4F (CC13x2) series processor that handles the application and an autonomous RF Core that handles all the low-level radio control and processing needed to transfer digital bits over the air. Normally the customers use the CM3/CM4F to implement their application/high level protocols on top of the physical layer, but it is also possible to use it to implement other novel or legacy physical layer modulation schemes. In order to do so, the CM3/CM4F requires access to the raw IQ samples in RX mode. With the default genfsk/prop PHY, IQ samples are not available outside RF Core and a dedicated patch is needed to automatically copy IQ samples to a partial read RX entry. This application note describes how to get access to these IQ samples using the IQ dump patch.
The IQ Dump patch (rf_patch_mce_iqdump.h) can run in two different modes; IQFifoBlind and IQFifoSync. IQFifoBlind mode starts copying IQ samples immediately while IQFifoSync mode starts copying IQ samples after a sync word has been detected. The mode of operation is selected by the MCE_RFE override (see Table 2-2). For both modes, IQ samples are copied through the RF Core’s internal FIFO to one or more partial read RX entries in the system RAM. The application simply waits for an RX_ENTRY_DONE interrupt saying that a partial read entry is full.
The IQ sample rate is fixed to 4 times oversampling and the IQ sample size is 12 bits. This means that each IQ pair will occupy 3 bytes in RAM in the format shown in Table 2-1. The format is signed meaning that MSB is the sign bit (two’s complement format).
Byte | Bit Definition | |||||||
---|---|---|---|---|---|---|---|---|
0 | I7 | I6 | I5 | I4 | I3 | I2 | I1 | I0 |
1 | Q3 | Q2 | Q1 | Q0 | I11 | I10 | I9 | I8 |
2 | Q11 | Q10 | Q9 | Q8 | Q7 | Q6 | Q5 | Q4 |
The patch has a built-in test pattern where the IQ samples are replaced with two counter values. The I-sample is replaced with an increasing counter value and the Q-sample is replaced with a decreasing counter value. The test pattern is enabled by the following register override:
HW_REG_OVERRIDE(0x52B4, 0x070D) // CC13x0
HW_REG_OVERRIDE(0x5328, 0x070D) // CC13x2