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  • 4 × Automotive Ethernet PHY Expansion for 100/1000Base-T1 Reference Design for Jacinto 7 Processors

    • TIDUF94 October   2024

       

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  • 4 × Automotive Ethernet PHY Expansion for 100/1000Base-T1 Reference Design for Jacinto 7 Processors
  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DP83TC818S-Q1 (Automotive SPE PHY)
      2. 2.3.2 TPS7B8233-Q1 (3.3V Vsleep Ultra-Low-IQ Low-Dropout Regulator)
      3. 2.3.3 TPS74701-Q1 (1.0V Rail Low-Dropout Regulator)
      4. 2.3.4 CDC6CE025000-Q1 (BAW Oscillator)
      5. 2.3.5 TPS4H160-Q1 (High-Side Switch)
  9. 3System Design Theory
    1. 3.1 Ethernet PHY
      1. 3.1.1 Ethernet PHY Power Supply
      2. 3.1.2 Ethernet PHY Clock Source
    2. 3.2 Power Coupling Network
      1. 3.2.1 High-Side Switch
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. IMPORTANT NOTICE
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Design Guide

4 × Automotive Ethernet PHY Expansion for 100/1000Base-T1 Reference Design for Jacinto 7 Processors

Description

This reference design interfaces with Jacinto™ 7 processor EVM boards through the RGMII Ethernet Expansion Connector. Four automotive Ethernet connections are added through TI's automotive Ethernet physical layers (PHY). This design shows an implementation with TI's DP83TC818S-Q1 100Mbps and DP83TG721S-Q1 1000Mbps single-pair Ethernet (SPE) PHY. A coupling network is used to couple in 12V to the data line.

 
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