SNVS497F November 2008 – September 2016 LM27341 , LM27341-Q1 , LM27342 , LM27342-Q1
PRODUCTION DATA.
The LM2734x and LM2734x-Q1 regulators are monolithic, high-frequency, PWM step-down DC-DC converters in 10-pin WSON and 10-pin MSOP-PowerPAD packages. They contain all the active functions to provide local DC-DC conversion with fast transient response and accurate regulation in the smallest possible PCB area.
With a minimum of external components, the LM2734x and LM2734x-Q1 are easy to use. The ability to drive 1.5-A or 2-A loads respectively, with an internal 150-mΩ NMOS switch results in the best power density available. The world-class control circuitry allows for on-times as low as 65 ns, thus supporting exceptionally high frequency conversion. Switching frequency is internally set to 2 MHz and synchronizable from 1 to 2.35 MHz, which allows the use of extremely small surface mount inductors and chip capacitors. Even though the operating frequency is very high, efficiencies up to 90% are easy to achieve. External shutdown is included, which features an ultra-low shutdown current of 70 nA. The LM2734x and LM2734x-Q1 use peak current-mode control and internal compensation to provide high-performance regulation over a wide range of operating conditions. Additional features include internal soft-start circuitry to reduce inrush current, pulse-by-pulse current limit, thermal shutdown, and output overvoltage protection.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM2734x LM2734x-Q1 |
MSOP-PowerPAD (10) | 4.90 mm × 3.00 mm |
WSON (10) | 3.00 mm × 3.00 mm |
Changes from E Revision (April 2013) to F Revision
Changes from D Revision (April 2013) to E Revision
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1, 2 | SW | O | Output switch. Connects to the inductor, catch diode, and bootstrap capacitor. |
3 | BOOST | I | Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is connected between the BOOST and SW pins. |
4 | EN | I | Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3 V. |
5 | SYNC | I | Frequency synchronization input. Drive this pin with an external clock or pulse train. Ground it to use the internal clock. |
6 | FB | I | Feedback pin. Connect FB to the external resistor divider to set output voltage. |
7 | GND | G | Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin for accurate regulation. |
8 | AVIN | I | Supply voltage for the control circuitry. |
9, 10 | PVIN | I | Supply voltage for output power stage. Connect a bypass capacitor to this pin. |
DAP | DAP | G | Signal or power ground and thermal connection. Tie this directly to GND (pin 7). See Application Information regarding optimum thermal layout. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
AVIN, PVIN | –0.5 | 24 | V | |
SW voltage | –0.5 | 24 | V | |
Boost voltage | –0.5 | 28 | V | |
Boost to SW voltage | –0.5 | 6 | V | |
FB voltage | –0.5 | 3 | V | |
SYNC voltage | –0.5 | 6 | V | |
EN voltage | –0.5 | VIN + 0.3 | V | |
Soldering, infrared reflow (5 s) | 260 | °C | ||
Junction temperature, TJ | 150 | °C | ||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) | ±2000 | V |
MIN | MAX | UNIT | |
---|---|---|---|
AVIN, PVIN | 3 | 20 | V |
SW voltage | –0.5 | 20 | V |
Boost voltage | –0.5 | 24 | V |
Boost to SW voltage | 3 | 5.5 | V |
Junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | LM2734x, LM2734x-Q1 | UNIT | ||
---|---|---|---|---|
DSC (WSON) | DGQ (MSOP-PowerPAD) | |||
10 PINS | 10 PINS | |||
RθJA | Junction-to-ambient thermal resistance(2) | 47.6 | 49.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 36.5 | 53.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 22.5 | 33.7 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.4 | 3.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 22.7 | 33.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 4.7 | 3.5 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
SYSTEM PARAMETERS | |||||||
VFB | Feedback voltage | TJ = 0°C to 85°C | 0.99 | 1 | 1.01 | V | |
TJ = –40°C to 125°C | 0.984 | 1 | 1.014 | ||||
ΔVFB/ΔVIN | Feedback voltage line regulation | VIN = 3 V to 20 V | 0.003% | V | |||
IFB | Feedback input bias current | TJ = 25°C | 20 | nA | |||
TJ = –40°C to 125°C | 100 | ||||||
OVP | Overvoltage protection | VFB at which PWM halts | 1.13 | V | |||
UVLO | Undervoltage lockout | VIN rising until VSW is switching | TJ = 25°C | 2.75 | V | ||
TJ = –40°C to 125°C | 2.6 | 2.9 | |||||
Undervoltage hysteresis | VIN falling from UVLO | TJ = 25°C | 0.47 | ||||
TJ = –40°C to 125°C | 0.3 | 0.6 | |||||
SS | Soft-start time | 0.5 | 1 | 1.5 | ms | ||
IQ | Quiescent current | IQ = IQ_AVIN + IQ_PVIN | VFB = 1.1 (not switching) | 2.4 | mA | ||
VEN = 0 V (shutdown) | 70 | nA | |||||
IBOOST | Boost pin current | fSW= 2 MHz | TJ = 25°C | 8.2 | mA | ||
TJ = –40°C to 125°C | 10 | ||||||
fSW= 1 MHz | 4.4 | 6 | |||||
OSCILLATOR | |||||||
fSW | Switching frequency | SYNC = GND | TJ = 25°C | 2 | MHz | ||
TJ = –40°C to 125°C | 1.75 | 2.3 | |||||
VFB_FOLD | FB pin voltage | SYNC input is overridden | 0.53 | V | |||
fFOLD_MIN | Frequency foldback minimum | VFB = 0 V | 220 | 250 | kHz | ||
LOGIC INPUTS (EN, SYNC) | |||||||
fSYNC | SYNC frequency range | 1 | 2.35 | MHz | |||
VIL | EN, SYNC logic low threshold | Logic falling edge | 0.4 | V | |||
VIH | EN, SYNC logic high threshold | Logic rising edge | 1.8 | ||||
tSYNC_HIGH | SYNC, time required above VIH to ensure a logical high | 100 | ns | ||||
tSYNC_LOW | SYNC, time required below VIL to ensure a logical low | 100 | ns | ||||
ISYNC | SYNC pin current | VSYNC < 5 V | 20 | nA | |||
IEN | Enable pin current | VEN = 3 V | 6 | 15 | µA | ||
VIN = VEN = 20 V | 50 | 100 | |||||
INTERNAL MOSFET | |||||||
RDS(ON) | Switch ON-resistance | TJ = 25°C | 150 | mΩ | |||
TJ = –40°C to 125°C | 320 | ||||||
ICL | Switch current limit | TJ = –40°C to 125°C | LM27342 | 2.5 | 4 | A | |
LM27341 | 2 | 3.7 | |||||
DMAX | Maximum duty cycle | SYNC = GND | TJ = 25°C | 93% | |||
TJ = –40°C to 125°C | 85% | ||||||
tMIN | Minimum ON-time | 65 | ns | ||||
ISW | Switch leakage current | 40 | nA | ||||
BOOST LDO | |||||||
VLDO | Boost LDO output voltage | 3.9 | V | ||||
THERMAL | |||||||
TSHDN | Thermal shutdown temperature | Junction temperature rising | 165 | °C | |||
Thermal shutdown hysteresis | Junction temperature falling | 15 |
VSYNC = GND | fSW = 2 MHz |
VIN = 12 V |
IQ = IAVIN + IPVIN |