LM3485 Hysteretic PFET Buck Controller
1 Features
- Easy-to-Use Control Methodology
- No Control-Loop Compensation Required
- 4.5-V to 35-V Wide Input Range
- 1.242-V to VIN Adjustable Output Range
- High Efficiency 93%
- ±1.3% (±2% Over Temp) Internal Reference
- 100% Duty Cycle
- Maximum Operating Frequency > 1 MHz
- Current Limit Protection
2 Applications
- Set-Top Box
- DSL or Cable Modem
- PC/IA
- Auto PC
- TFT Monitor
- Battery-Powered Portable Applications
- Distributed Power Systems
- Always On Power
3 Description
The LM3485 is a high-efficiency PFET switching regulator controller that can be used to quickly and easily develop a small, low-cost, switching buck regulator for a wide range of applications. The hysteretic control architecture provides for simple design without any control-loop stability concerns using a wide variety of external components. The PFET architecture also allows for low component count as well as ultralow dropout, 100% duty cycle operation. Another benefit is high efficiency operation at light loads without an increase in output ripple.
Current limit protection is provided by measuring the voltage across the RDS(ON) of the PFET, thus eliminating the need for a sense resistor. The cycle-by-cycle current limit can be adjusted with a single resistor, ensuring safe operation over a range of output currents.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| LM3485 | VSSOP (8) | 3.0 mm × 3.0 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Typical Application Circuit
4 Revision History
Changes from G Revision (February 2013) to H Revision
- Added ESD Ratings, Thermal Information table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go
Changes from F Revision (February 2013) to G Revision
- Changed layout of National Data Sheet to TI formatGo
5 Pin Configuration and Functions
Pin Functions
| NO. | NAME | I/O | DESCRIPTION |
|---|---|---|---|
| 1 | ISENSE | I | The current sense input pin. This pin should be connected to Drain node of the external PFET. |
| 2 | GND | G | Signal ground |
| 3 | NC | — | No connection |
| 4 | FB | I | The feedback input. Connect the FB to a resistor voltage divider between the output and GND for an adjustable output voltage. |
| 5 | ADJ | I | Current limit threshold adjustment. It connects to an internal 5.5-µA current source. A resistor is connected between this pin and the input Power Supply. The voltage across this resistor is compared with the VDS of the external PFET to determine if an over-current condition has occurred. |
| 6 | PWR GND | G | Power ground |
| 7 | PGATE | O | Gate Drive output for the external PFET. PGATE swings between VIN and VIN-5 V. |
| 8 | VIN | P/I | Power supply input pin |
