The LM5161 is a 100-V, 1-A synchronous step-down converter with integrated high-side and low-side MOSFETs. The constant-ON-time control scheme requires no loop compensation and supports high step-down ratios with fast transient response. An internal feedback amplifier maintains ±1% output voltage regulation over the entire operating temperature range. The ON-time varies inversely with input voltage resulting in nearly constant switching frequency. Peak and valley current limit circuits protect against overload conditions. The under-voltage lockout (EN/UVLO) circuit provides independently adjustable input undervoltage threshold and hysteresis. The FPWM input pin in LM5161 selects either the forced continuous conduction mode (CCM) under all load levels or the discontinuous conduction mode (DCM) under light or no load conditions. When operating in forced CCM, the LM5161 supports the multiple output and isolated Fly-Buck applications. When programmed for the DCM operation, the LM5161 provides a tightly regulated buck output without any additional external feedback ripple injection circuit.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM5161 | HTSSOP (14) | 5.00 mm × 4.40 mm |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | HTSSOP | ||
AGND | 1 | - | Analog ground. Ground connection of internal control circuits. |
PGND | 2 | - | Power ground. Ground connection of the internal synchronous rectifier FET. |
VIN | 3 | I | Input supply connection. Operating input range is 4.5-V to 100-V. |
EN/UVLO | 4 | I | Precision enable. Input pin of undervoltage lockout (UVLO) comparator. |
RON | 5 | I | On-time programming pin. A resistor between this pin and VIN sets the switch ON-time as a function of input voltage. |
SS | 6 | I | Soft start. Connect a capacitor from SS to AGND to control output rise time and limit overshoot. |
FPWM | 8 | I | Forced PWM logic input pin. Connect to AGND for discontinuous conduction mode (DCM) with light loads. Connect to VCC for continuous conduction mode (CCM) at all loads and Fly-Buck configuration. |
FB | 9 | I | Feedback input of voltage regulation comparator. |
VCC | 10 | O | Internal high voltage start-up regulator bypass capacitor pin. |
BST | 11 | I | Bootstrap capacitor pin. Connect a capacitor between BST and SW to bias gate driver of high-side buck FET. |
SW | 12,13 | O | Switch node. Source connection of high side buck FET and drain connection of low-side synchronous rectifier FET. |
NC | 7,14 | No connection | |
EP | - | Exposed pad. Connect to AGND and printed-circuit board ground plane to improve power dissipation. |