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  • LM5171 Dual Channel Bidirectional Controller

    • SNVSCM3 June   2024 LM5171

      PRODUCTION DATA  

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  • LM5171 Dual Channel Bidirectional Controller
  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Device Configurations (CFG) and I2C Address
      2. 6.1.2 Definition of IC Operation Modes
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Bias Supplies and Voltage Reference (VCC, VDD, and VREF)
      2. 6.3.2  Undervoltage Lockout (UVLO) and Controller Enable or Disable
      3. 6.3.3  High Voltage Inputs (HV1, HV2)
      4. 6.3.4  Current Sense Amplifier
      5. 6.3.5  Control Commands
        1. 6.3.5.1 Channel Enable Commands (EN1, EN2)
        2. 6.3.5.2 Direction Command (DIR1 and DIR2)
        3. 6.3.5.3 Channel Current Setting Commands (ISET1 and ISET2)
      6. 6.3.6  Channel Current Monitor (IMON1, IMON2)
        1. 6.3.6.1 Individual Channel Current Monitor
        2. 6.3.6.2 Multiphase Total Current Monitoring
      7. 6.3.7  Cycle-by-Cycle Peak Current Limit (IPK)
      8. 6.3.8  Inner Current Loop Error Amplifier
      9. 6.3.9  Outer Voltage Loop Error Amplifier
      10. 6.3.10 Soft Start, Diode Emulation, and Forced PWM Control (SS/DEM1 and SS/DEM2)
        1. 6.3.10.1 Soft-Start Control by the SS/DEM Pins
        2. 6.3.10.2 DEM Programming
        3. 6.3.10.3 FPWM Programming and Dynamic FPWM and DEM Change
        4. 6.3.10.4 SS Pin as the Restart Timer
          1. 6.3.10.4.1 Restart Timer in OVP
          2. 6.3.10.4.2 Restart Timer after a DIR Change
      11. 6.3.11 Gate Drive Outputs, Dead Time Programming and Adaptive Dead Time (HO1, HO2, LO1, LO2, DT/SD)
      12. 6.3.12 Emergency Latched Shutdown (DT/SD)
      13. 6.3.13 PWM Comparator
      14. 6.3.14 Oscillator (OSC)
      15. 6.3.15 Synchronization to an External Clock (SYNCI, SYNCO)
      16. 6.3.16 Overvoltage Protection (OVP)
      17. 6.3.17 Multiphase Configurations (SYNCO, OPT)
        1. 6.3.17.1 Multiphase in Star Configuration
        2. 6.3.17.2 Daisy-Chain Configurations for 2, 3, or 4 Phases parallel operations
        3. 6.3.17.3 Daisy-Chain configuration for 6 or 8 phases parallel operation
      18. 6.3.18 Thermal Shutdown
    4. 6.4 Programming
      1. 6.4.1 Dynamic Dead Time Adjustment
      2. 6.4.2 UVLO Programming
    5. 6.5 Registers
      1. 6.5.1 I2C Serial Interface
      2. 6.5.2 I2C Bus Operation
      3. 6.5.3 Clock Stretching
      4. 6.5.4 Data Transfer Formats
      5. 6.5.5 Single READ From a Defined Register Address
      6. 6.5.6 Sequential READ Starting From a Defined Register Address
      7. 6.5.7 Single WRITE to a Defined Register Address
      8. 6.5.8 Sequential WRITE Starting From A Defined Register Address
      9. 6.5.9 REGFIELD Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Small Signal Model
        1. 7.1.1.1 Current Loop Small Signal Model
        2. 7.1.1.2 Current Loop Compensation
        3. 7.1.1.3 Voltage Loop Small Signal Model
        4. 7.1.1.4 Voltage Loop Compensation
    2. 7.2 Typical Application
      1. 7.2.1 60A, Dual-Phase, 48V to 12V Bidirectional Converter
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Determining the Duty Cycle
          2. 7.2.1.2.2  Oscillator Programming
          3. 7.2.1.2.3  Power Inductor, RMS and Peak Currents
          4. 7.2.1.2.4  Current Sense (RCS)
          5. 7.2.1.2.5  Current Setting Limits (ISETx)
          6. 7.2.1.2.6  Peak Current Limit
          7. 7.2.1.2.7  Power MOSFETS
          8. 7.2.1.2.8  Bias Supply
          9. 7.2.1.2.9  Boot Strap
          10. 7.2.1.2.10 OVP
          11. 7.2.1.2.11 Dead Time
          12. 7.2.1.2.12 Channel Current Monitor (IMONx)
          13. 7.2.1.2.13 UVLO Pin Usage
          14. 7.2.1.2.14 HVx Pin Configuration
          15. 7.2.1.2.15 Loop Compensation
          16. 7.2.1.2.16 Soft Start
          17. 7.2.1.2.17 PWM to ISET Pins
          18. 7.2.1.2.18 Proper Termination of Unused Pins
        3. 7.2.1.3 Application Curves
          1. 7.2.1.3.1 Efficiency
          2. 7.2.1.3.2 Step Load Response
          3. 7.2.1.3.3 Dual-Channel Interleaving Operation
          4. 7.2.1.3.4 Typical Start Up and Shutdown
          5. 7.2.1.3.5 DEM and FPWM
          6. 7.2.1.3.6 Mode transition between DEM and FPWM
          7. 7.2.1.3.7 ISET Tracking and PreCharge
          8. 7.2.1.3.8 Protections
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
  12. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • PHP|48
    • MPQF051B
Thermal pad, mechanical data (Package|Pins)
  • PHP|48
    • PPTD259B
Orderable Information
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Data Sheet

LM5171 Dual Channel Bidirectional Controller

1 Features

  • Functional Safety-Capable
  • 85V HV-port and 80V LV-port max ratings
  • 1% Typical accuracy of bidirectional current regulation
  • 1% Typical accuracy of channel current monitoring
  • I2C interface for monitoring and diagnosis
  • Built-in 3.5V 1% reference voltage
  • Integrated 5V 10mA bias supply
  • 5A peak half-bridge gate drivers
  • Programmable or adaptive dead-time control
  • Programmable oscillator frequency up to 1MHz with optional synchronization to external clock
  • Independent channel enabling control inputs
  • Integrated both current and voltage loop control
  • Programmable cycle-by-cycle peak current limit
  • Over-temperature shutdown
  • HV and LV port overvoltage protection
  • Dynamically selectable diode emulation and forced PWM operation modes
  • Programmable soft-start timer
  • Support both multiphase and independent channel operations
  • Support urgent shutdown latch

2 Applications

  • Battery Testing System (BTS)
  • Super-cap or battery backup power converter
  • Stackable high-power buck or boost applications

3 Description

The LM5171 controller provides the high voltage and precision elements of a dual-channel bidirectional converter. Examples include dual battery systems. The LM5171 supports multiphase parallel operation with balanced current sharing in each phase. The LM5171 also supports independent channel bi-directional operations making it versatile as standalone controller operating as multiphase Buck/Boost or independent Buck or Boost.

The dual-channel differential current sense amplifiers and dedicated channel current monitors achieve typical accuracy of 1%. The robust 5A half-bridge gate drivers are capable of driving parallel MOSFETs for scaling more power per channel. The controller can be dynamically programmed to operate in either the diode emulation mode (DEM) or forced PWM (FPWM) mode. Versatile protection features include cycle-by-cycle current limiting, overvoltage protection at both HV and LV ports, and overtemperature protection and urgent shutdown latch.

Device Information(1)
PART NUMBERPACKAGEBODY SIZE (NOM)
LM5171TQFP (48)7.00mm × 7.00mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
LM5171 Inductor Current Tracking with Direction ChangeInductor Current Tracking with Direction Change
LM5171 Simplified Application CircuitSimplified Application Circuit

4 Pin Configuration and Functions

LM5171 PHP Package48-Pin TQFPTop View Figure 4-1 PHP Package48-Pin TQFPTop View
Table 4-1 Pin Functions
PINI/O(1)DESCRIPTION
NO.NAME
1VREFPOutput of the built-in 3.5V +/- 1% reference voltage.
2FBLVIThe inverting input pin for the buck error voltage amplifier.
3ERRLVOOutput pin of the buck error voltage amplifier.
4IMON2OCH-2 current monitor pin.
5CSA2ICH-2 differential current sense inputs.
6CSB2I
7ISET2ICH-2 analog current programming pin.
8COMP2OOutput of the CH-2 transconductance (gm) error amplifier and the inverting input of the CH-2 PWM comparator.
9SS/DEM2IThe soft-start programming pin for CH-2 controller. It also sets CH-2 in either DEM or FPWM.
10EN2ICH-2 enable pin.
11DIR2ICH-2 direction command input.
12VDDPOutput of 5V internal LDO.
13HV2IThe input pin connecting to the HV-Port line voltage for CH-2 controller.
14HB2ICH-2 high-side gate driver bootstrap supply input.
15HO2OCH-2 high-side gate driver output.
16SW2PCH-2 switch node.
17LO2OCH-2 low-side gate driver output.
18PGNDGPower ground connection pin.
19VCCPVCC bias supply pin.
20LO1OCH-1 low-side gate driver output.
21SW1PCH-1 switch node.
22HO1OCH-1 high-side gate driver output.
23HB1ICH-1 high-side gate driver bootstrap supply input.
24HV1IThe input pin connecting to the HV-Port line voltage for CH-1 controller.
25LDODRVOControl pin for the external VCC LDO MOSFET.
26DIR1ICH-1 direction command input.
27EN1ICH-1 enable pin.
28SS/DEM1IThe soft-start programming pin for CH-1 controller. It also sets CH-1 in either DEM or FPWM.
29COMP1OOutput of the CH-1 trans-conductance (gm) error amplifier and the inverting input of the CH-1 PWM comparator.
30ISET1ICH-1 analog current programming pin.
31CSB1ICH-1 differential current sense inputs.
32CSA1I
33IMON1OCH-1 current monitor pin.
34ERRHVOOutput pin of the boost error voltage amplifier.
35FBHVIThe inverting input pin for the boost error voltage amplifier.
36OVPIInput of the built-in over-voltage comparator.
37SDAI/OData of I2C interface.
38SCLIClock of I2C interface.
39SYNCOOClock synchronization output pin.
40SYNCIIClock synchronization input pin.
41OPTIMultiphase configuration pin.
42OSCIThe internal oscillator frequency programming pin.
43AGNDGAnalog ground reference.
44CFGIThe I2C address setting and current monitor mode selection pin.
45UVLOIThe UVLO pin, which also serves as the Controller-Peripheral enable pin.
46DT/SDIDead-time programming and emergent latched shutdown pin.
47IPKIPeak current limit programming pin.
48VSETIVoltage error amplifier reference input pin.
—EP—Exposed pad of the package.
(1) Note: G = Ground, I = Input, O = Output, P = Power

 
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