SNVSBE4C
March 2020 – June 2021
LM61440-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Timing Characteristics
8.7
Systems Characteristics
8.8
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
EN/SYNC Uses for Enable and VIN UVLO
9.3.2
EN/SYNC Pin Uses for Synchronization
9.3.3
Clock Locking
9.3.4
Adjustable Switching Frequency
9.3.5
PGOOD Output Operation
9.3.6
Internal LDO, VCC UVLO, and BIAS Input
9.3.7
Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
9.3.8
Adjustable SW Node Slew Rate
9.3.9
Spread Spectrum
9.3.10
Soft Start and Recovery From Dropout
9.3.11
Output Voltage Setting
9.3.12
Overcurrent and Short Circuit Protection
9.3.13
Thermal Shutdown
9.3.14
Input Supply Current
9.4
Device Functional Modes
9.4.1
Shutdown Mode
9.4.2
Standby Mode
9.4.3
Active Mode
9.4.3.1
CCM Mode
9.4.3.2
Auto Mode - Light Load Operation
9.4.3.2.1
Diode Emulation
9.4.3.2.2
Frequency Reduction
9.4.3.3
FPWM Mode - Light Load Operation
9.4.3.4
Minimum On-time (High Input Voltage) Operation
9.4.3.5
Dropout
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Choosing the Switching Frequency
10.2.2.2
Setting the Output Voltage
10.2.2.3
Inductor Selection
10.2.2.4
Output Capacitor Selection
10.2.2.5
Input Capacitor Selection
10.2.2.6
BOOT Capacitor
10.2.2.7
BOOT Resistor
10.2.2.8
VCC
10.2.2.9
BIAS
10.2.2.10
CFF and RFF Selection
10.2.2.11
External UVLO
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
Ground and Thermal Considerations
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RJR|14
MPQF507D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsbe4c_oa
snvsbe4c_pm
1
Features
AEC-Q100 qualified with the following results:
Temperature grade 1: –40°C to 150°C, T
J
Functional Safety-Capable
Documentation available to aid functional safety system design
Optimized for ultra-low EMI requirements
HotRod package minimizes switch node ringing
Parallel input path minimizes parasitic inductance
Spread spectrum reduces peak emissions
Adjustable SW node rise time
Designed for automotive applications
Supports 42-V automotive load dump
±1% total output regulation accuracy
V
OUT
adjustable from 1 V to 95% of V
IN
0.3-V dropout with 3-A load (typical)
High efficiency power conversion at all loads
7-μA no load current at 13.5 V
IN
, 3.3 V
OUT
83% PFM efficiency at 1-mA, 13.5 V
IN
, 5 V
OUT
External bias option for improved efficiency
Suitable for scalable power supplies
Pin compatible with:
LM61460-Q1
(36 V, 6 A, adjustable f
SW
)
LM61435-Q1
(36, 3.5 A, adjustable f
SW
)