SNAS636C
December 2013 – July 2021
LMK00338
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
7.1
Differential Voltage Measurement Terminology
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Crystal Power Dissipation vs. RLIM
8.3.2
Clock Inputs
8.3.3
Clock Outputs
8.3.3.1
Reference Output
8.4
Device Functional Modes
8.4.1
VCC and VCCO Power Supplies
9
Power Supply Recommendations
9.1
Current Consumption and Power Dissipation Calculations
9.1.1
Power Dissipation Example: Worst-Case Dissipation
9.2
Power Supply Bypassing
9.2.1
Power Supply Ripple Rejection
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Thermal Management
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
Package Options
Mechanical Data (Package|Pins)
RTA|40
MPQF134A
Thermal pad, mechanical data (Package|Pins)
RTA|40
QFND447B
Orderable Information
snas636c_oa
snas636c_pm
1
Features
3:1 Input Multiplexer
Two Universal Inputs Operate up to 400 MHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks
One Crystal Input Accepts a 10-MHz to 40-MHz Crystal or Single-Ended Clock
Two Banks With 4 Differential Outputs Each
HCSL, or Hi-Z (Selectable per Bank)
Additive RMS Phase Jitter for PCIe Gen5 at 100 MHz:
15 fs RMS (Typical)
–72 dBc at 156.25 MHz
LVCMOS Output With Synchronous Enable Input
Pin-Controlled Configuration
V
CC
Core Supply: 3.3 V ± 5%
3 Independent V
CCO
Output Supplies: 3.3 V/2.5 V ± 5%
Industrial Temperature Range: –40°C to +85°C
40-lead WQFN (6 mm × 6 mm)