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Data Sheet
LMK05318B-Q1 Ultra-Low Jitter Network Synchronizer and Clock
Generator With BAW VCO for Automotive and Industrial
Applications
1 Features
- AEC-Q100 qualified for
automotive applications
- Temperature grade 2:
–40°C to 105°C
- Ultra-low jitter BAW VCO based Ethernet clocks
- 50fs typical RMS jitter at 312.5MHz
- 60fs typical RMS jitter at 156.25MHz
- One high-performance Digital Phase-Locked Loop
(DPLL) paired with two Analog Phase Locked Loops (APLLs):
- Programmable DPLL loop bandwidth
- < 1-ppt DCO frequency adjustment step size
- Two differential or single-ended DPLL inputs
- 1Hz (1-PPS) to 800MHz input frequency
- Digital holdover and hitless switching
- Eight
differential
outputs with programmable HSDS/LVPECL, LVDS, HSCL and 1.8V LVCMOS output
formats.
- Up to six different output frequencies
- 1Hz (1-PPS) to 1250MHz output frequency
- PCIe Gen 1 to 6
compliant
- I2C or SPI register control bus
- EEPROM for custom system configurations on start-up
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