Very low phase noise floor: -164 dBc/Hz (typical)
Very low propagation delay: < 575 ps maximum
Output skew: 20 ps maximum
LMK1D1212: 6-mm × 6-mm, 40-pin VQFN (RHA)
LMK1D1216: 7-mm × 7-mm, 48-pin VQFN (RGZ)
The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS.
The LMK1D121x is specifically designed for driving 50-Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin (see Figure 9-6).
The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature).
PART NUMBER(1) | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LMK1D1212 | VQFN (40) | 6.00 mm × 6.00 mm |
LMK1D1216 | VQFN (48) | 7.00 mm × 7.00 mm |
Changes from Revision * (October 2021) to Revision A (April 2023)
Device | Device Type | Features | Output Swing | Package | Body Size |
---|---|---|---|---|---|
LMK1D2108 | Dual 1:8 | Global output enable and swing control via pin control | 350 mV | VQFN (48) | 7.00 mm x 7.00 mm |
500 mV | |||||
LMK1D2106 | Dual 1:6 | Global output enable and swing control via pin control | 350 mV | VQFN (40) | 6.00 mm x 6.00 mm |
500 mV | |||||
LMK1D2104 | Dual 1:4 | Global output enable and swing control via pin control | 350 mV | VQFN (28) | 5.00 mm x 5.00 mm |
500 mV | |||||
LMK1D2102 | Dual 1:2 | Global output enable and swing control via pin control | 350 mV | VQFN (16) | 3.00 mm x 3.00 mm |
500 mV | |||||
LMK1D1216 | 2:16 | Global output enable control via pin control | 350 mV | VQFN (48) | 7.00 mm x 7.00 mm |
500 mV | |||||
LMK1D1212 | 2:12 | Global output enable control via pin control | 350 mV | VQFN (40) | 6.00 mm x 6.00 mm |
500 mV | |||||
LMK1D1208P | 2:8 | Individual output enable control via pin control | 350 mV | VQGN (40) | 6.00 mm x 6.00 mm |
500 mV | |||||
LMK1D1208I | 2:8 | Individual output enable control via I2C | 350 mV | VQFN (40) | 6.00 mm x 6.00 mm |
500 mV | |||||
LMK1D1208 | 2:8 | Global output enable control via pin control | 350 mV | VQFN (28) | 5.00 mm x 5.00 mm |
LMK1D1204P | 2:4 | Individual output enable control via pin control | 350 mV | VQGN (28) | 5.00 mm x 5.00 mm |
LMK1D1204 | 2:4 | Global output enable control via pin control | 350 mV | VQFN (16) | 3.00 mm x 3.00 mm |