SNAS855D
November 2023 – June 2024
LMKDB1104
,
LMKDB1108
,
LMKDB1120
,
LMKDB1204
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
SMBus Timing Requirements
6.7
SBI Timing Requirements
6.8
Timing Diagrams
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Features
8.3.1.1
Running Input Clocks When Device is Powered Off
8.3.1.2
Fail-Safe Inputs
8.3.1.3
Input Configurations
8.3.1.3.1
Internal Termination for Clock Inputs
8.3.1.3.2
AC-Coupled or DC-Coupled Clock Inputs
8.3.2
Flexible Power Sequence
8.3.2.1
PWRDN# Assertion and Deassertion
8.3.2.2
OE# Assertion and Deassertion
8.3.2.3
PWRGD Assertion
8.3.2.4
Clock Input and PWRGD/PWRDN# Behaviors When Device Power is Off
8.3.3
LOS and OE
8.3.3.1
Additional OE# Pins for LMKDB1120 and Backward Compatibility
8.3.3.2
Synchronous OE
8.3.3.3
OE Control
8.3.3.4
Automatic Output Disable
8.3.3.5
LOS Detection
8.3.4
Output Features
8.3.4.1
Output Banks
8.3.4.2
Double Termination
8.3.4.3
Programmable Output Slew Rate
8.3.4.3.1
Slew Rate Control through Pin
8.3.4.3.2
Slew Rate Control through SMBus
8.3.4.4
Programmable Output Swing
8.3.4.5
Accurate Output Impedance
8.3.4.6
Programmable Output Impedance
8.4
Device Functional Modes
8.4.1
SMBus Mode
8.4.2
SBI Mode
8.4.3
Pin Mode
9
Register Maps
9.1
LMKDB1120 Registers
9.2
LMKDB1108 Registers
9.3
LMKDB1104 Registers
9.4
LMKDB1204 Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
10.3
Power Supply Recommendations
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
REX|28
MPQF766
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snas855d_oa
snas855d_pm
Data Sheet
LMKDB1xxx PCIe Gen 1 to Gen 6 Ultra Low Jitter 1:20, 1:8, 1:4, 1:2, 2:4, 2:2 LP-HCSL Clock Buffer and Clock MUX