LMP2011 Single/LMP2012 Dual High Precision, Rail-to-Rail Output Operational Amplifier
1 Features
- Low Ensured VOS Over Temperature 60 µV
- Low Noise with No 1/f 35nV/√Hz
- High CMRR 130 dB
- High PSRR 120 dB
- High AVOL 130 dB
- Wide Gain-Bandwidth Product 3 MHz
- High Slew Rate 4 V/µs
- Low Supply Current 930 µA
- Rail-to-Rail Output 30 mV
- No External Capacitors Required
(For VS = 5 V, Typical Unless Otherwise Noted)
2 Applications
- Precision Instrumentation Amplifiers
- Thermocouple Amplifiers
- Strain Gauge Bridge Amplifier
3 Description
The LMP201x series are the first members of TI's new LMP™ precision amplifier family. The LMP201x series offers unprecedented accuracy and stability in space-saving miniature packaging, offered at an affordable price. This device utilizes patented auto-zero techniques to measure and continually correct the input offset error voltage. The result is an amplifier which is ultra-stable over time and temperature. It has excellent CMRR and PSRR ratings, and does not exhibit the familiar 1/f voltage and current noise increase that plagues traditional amplifiers. The combination of the LMP201x characteristics makes it a good choice for transducer amplifiers, high gain configurations, ADC buffer amplifiers, DAC I-V conversion, and any other 2.7-V to 5-V application requiring precision and long term stability.
Other useful benefits of the LMP201x are rail-to-rail output, a low supply current of 930 µA, and wide gain-bandwidth product of 3 MHz. These versatile features found in the LMP201x provide high performance and ease of use.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| LMP2011 | SOIC (8) | 4.90 mm × 3.91 mm |
| SOT-23 (5) | 2.90 mm × 1.60 mm | |
| LMP2012 | SOIC (8) | 4.90 mm × 3.91 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Bridge Amplifier
Offset Voltage vs Common Mode Voltage
4 Revision History
Changes from K Revision (March 2013) to L Revision
- Added Pin Configuration and Functions section, Storage Conditions table, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
Changes from J Revision (March 2013) to K Revision
- Changed layout of National Data Sheet to TI formatGo
5 Pin Configuration and Functions
Pin Functions: LMP2011
| PIN | I/O | DESCRIPTION | ||||
|---|---|---|---|---|---|---|
| NAME | NO. | |||||
| DBV | D | |||||
| -IN | 4 | 3 | O | Inverting input | ||
| +IN | 3 | 2 | I | Non-Inverting input | ||
| N/C | - | 1 | - | No Internal Connection | ||
| N/C | - | 5 | - | No Internal Connection | ||
| N/C | - | 8 | - | No Internal Connection | ||
| OUT | 1 | 6 | I | Output | ||
| V- | 2 | 4 | P | Negative (lowest) power supply | ||
| V+ | 5 | 7 | P | Positive (highest) power supply | ||
Pin Functions: LMP2012
| PIN | I/O | DESCRIPTION | |||
|---|---|---|---|---|---|
| NAME | NO. | ||||
| D, DGK | |||||
| –IN A | 2 | I | Inverting input, channel A | ||
| +IN A | 3 | I | Non-Inverting input, channel A | ||
| –IN B | 6 | I | Inverting input, channel B | ||
| +IN B | 5 | I | Non-Inverting input, channel B | ||
| OUT A | 1 | O | Output, channel A | ||
| OUT B | 7 | O | Output, channel B | ||
| V– | 4 | P | Negative (lowest) power supply | ||
| V+ | 8 | P | Positive (highest) power supply | ||
