The LMP8350 device is an ultra low distortion fully-differential amplifier designed for driving high-performance precision analog-to-digital converters (ADC). As part of the PowerWise™ family, a unique mode enable pin allows the user to choose from three different operating modes, trading power consumption for dynamic performance.
The high power mode is optimized for highest AC performance. The low noise, wide bandwidth, and fast slew rate make the LMP8350 ideal for driving 24-bit ADCs with input sampling rates of 10 MHz or less. The medium power mode is optimized for precision DC performance, and can be used to drive 24-bit ADCs with input sampling rates of 6 MHz or less. The low power mode is a trade-off between AC performance and quiescent current for power-sensitive applications. The disable mode fully shuts down the amplifier for further standby power savings.
The fully differential architecture of this device allows for easy implementation of a single-ended to fully-differential output conversion. Driving a 3-Vpp, 1-kHz output sine wave with the amplifier powered by ±3.3-V rails in high power mode yields 0.000098% THD+N.
The LMP8350 is part of the LMP™ precision amplifier family, and is offered in the 8-pin SOIC package, with an operating temperature range of −40°C to +85°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LMP8350 | SOIC (8) | 3.91 mm × 4.90 mm |
Changes from B Revision (March 2013) to C Revision
Changes from A Revision (March 2013) to B Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | –IN | I | Inverting Input |
2 | VOCM | I | Output common-mode voltage set input. Sets output common mode voltage equal to the applied VOCM pin voltage. |
3 | V+ | I | Positive power supply voltage |
4 | +OUT | O | Noninverting output |
5 | –OUT | O | Inverting output |
6 | V– | I | Negative power supply voltage |
7 | EN | I | Enable and power select input. Applied voltage sets power level or shutdown mode. |
8 | +IN | I | Noninverting Input |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Output short circuit duration | See (4) | |||
V+ relative to V– | –0.3 | 12.9 | V | |
IN+, IN–, OUT, EN and VOCM pins | (V+) + 0.3 | (V–) – 0.3 | V | |
Input current | 1 | mA | ||
Junction temperature(5) | 150 | °C | ||
Storage temperature, Tstg | −65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(3) | ±2500 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1250 | |||
Machine Model | ±200 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Temperature range (TA) | –40 | 85 | °C | |
Supply voltage (VS = V+ – V–) | 4.5 | 12 | V |
THERMAL METRIC(1) | LMP8350 | UNIT | |
---|---|---|---|
D (SOIC) | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance (2) | 150 | °C/W |
PARAMETER | TEST CONDITIONS(2) | MIN(3) | TYP(4) | MAX(3) | UNIT | ||
---|---|---|---|---|---|---|---|
10-V DC CHARACTERISTICS | |||||||
VOS | Input offset voltage (RTI) |
High power | TA = 25°C | ±0.6 | ±4 | mV | |
At the temperature extremes | ±4.05 | ||||||
Mid power | TA = 25°C | ±0.08 | ±2 | ||||
At the temperature extremes | ±2.03 | ||||||
Low power | TA = 25°C | ±0.1 | ±2.5 | ||||
At the temperature extremes | ±2.52 | ||||||
TCVOS | Input offset voltage vs.temperature(5) | High power | ±0.8 | μV/°C | |||
Mid power | ±0.5 | ||||||
Low power | ±0.4 | ||||||
IB | Input bias current | High power | TA = 25°C | 2 | μA | ||
At the temperature extremes | 2.1 | ||||||
Mid power | TA = 25°C | 2.7 | |||||
At the temperature extremes | 3.2 | ||||||
Low power | TA = 25°C | 3.5 | |||||
At the temperature extremes | 3.7 | ||||||
AVOL | Open-loop gain | High power | 65 | 90 | dB | ||
Mid power | 72 | 130 | |||||
Low power | 74 | 114 | |||||
CMVR | Common-mode voltage range(6) | HP at CMRR ≥ 73 dB | 1.2 | 8.8 | V | ||
MP at CMRR ≥ 83 dB | 1.2 | 8.8 | |||||
LP at CMRR ≥ 77 dB | 1.2 | 8.8 | |||||
CMRR | Common-mode rejection ratio | DC, VOCM = 0,VID = 0, ΔVcm = ±0.2 V, High power | 75 | 90 | dB | ||
Medium power | 84 | 130 | |||||
Low power | 79 | 114 | |||||
ZIND | Differential input resistance | VCM = mid-supply | 0.48 | MΩ | |||
CIND | Differential input capacitance | VCM = mid-supply | 1 | pF | |||
VO | Output swing (single-ended) |
High power | Low Swing | 0.86 | 0.75 | 9.14 | V |
High Swing | 0.86 | 9.25 | 9.14 | ||||
Mid power | Low Swing | 0.85 | 0.74 | 9.15 | |||
High Swing | 0.85 | 9.26 | 9.15 | ||||
Low power | Low Swing | 0.86 | 0.81 | 9.14 | |||
High Swing | 0.86 | 9.19 | 9.14 | ||||
ISHORT | Short-circuit current | Output shorted to mid-supply(7)
High power |
Low Swing | –36 | -65 | mA | |
High Swing | 75 | 108 | |||||
Medium power | Low Swing | -26 | -48 | ||||
High Swing | 60 | 85 | |||||
Low power | Low Swing | -6 | -20 | ||||
High Swing | 15 | 36 | |||||
PSRR | Power supply rejection ratio VS ±10% |
High power | 107 | dB | |||
Mid power | 118 | ||||||
Low power | 124 | ||||||
IS | Supply current | VEN = 8.75(8) | TA = 25°C | 15 | 18 | mA | |
At the temperature extremes | 20 | ||||||
VEN = 6.25(8) | TA = 25°C | 8 | 10 | ||||
At the temperature extremes | 11 | ||||||
VEN = 3.75(8) | TA = 25°C | 3 | 4 | ||||
At the temperature extremes | 5 | ||||||
PD | Power-down mode | Disable voltage threshold(8) | < 1.65 | V | |||
Shutdown current | TA = 25°C | 0.75 | 0.9 | mA | |||
At the temperature extremes | 0.95 | ||||||
Enable pin current | 100 | μA | |||||
ten | Enable time | High power | 15 | ns | |||
Mid power | 20 | ||||||
Low power | 40 | ||||||
10-V AC CHARACTERISTICS | |||||||
SSBW | Small signal bandwidth 200 mVp-p differential |
High power | 118 | MHz | |||
Mid power | 87 | ||||||
Low power | 31 | ||||||
SR | Slew rate 2 Vp-p differential(9) |
High power | 507 | V/μs | |||
Mid power | 393 | ||||||
Low power | 178 | ||||||
trise | Rise time 2 Vp-p differential |
High power | 3 | ns | |||
Mid power | 3.9 | ||||||
Low power | 9.7 | ||||||
tfall | Fall time 2 Vp-p differential |
High power | 2.8 | ns | |||
Mid power | 3.8 | ||||||
Low power | 9.6 | ||||||
ts | 0.1% settling time 2 Vp-p |
2-V step, CL = 20 pF High power |
20 | ns | |||
Mid power | 25 | ||||||
Low power | 38 | ||||||
en | Input referred voltage noise at 10 KHz |
High power | 4.6 | nV/√Hz | |||
Mid power | 4.8 | ||||||
Low power | 8 | ||||||
In | Input referred current noise at 10 KHz |
f = 10 kHz High power |
1.7 | pA/√Hz | |||
Mid power | 1.1 | ||||||
Low power | 0.6 | ||||||
THD+N | Total harmonic distortion + noise 3 Vp-p at 1 KHz |
High power | 0.000097% | ||||
Mid power | 0.000109% | ||||||
Low power | 0.000185% | ||||||
HD2 | 2nd harmonic distortion 3 Vp-p, 1 KHz |
High power | –124.7 | –116 | dBc | ||
Mid power | –122.8 | ||||||
Low power | –117.2 | ||||||
2nd harmonic distortion 6 Vp-p, 1 KHz |
High power | –118.9 | dBc | ||||
Mid power | –117.6 | ||||||
Low power | –114.7 | ||||||
HD3 | 3rd harmonic distortion 3 Vp-p, 1 KHz |
High power | –139.9 | –126 | dBc | ||
Mid power | –141.9 | ||||||
Low power | –133.3 | ||||||
3rd harmonic distortion 6 Vp-p, 1 KHz |
High power | –129.5 | dBc | ||||
Mid power | –132.4 | ||||||
Low power | –129.4 | ||||||
10-V VOCM INPUT CHARACTERISTICS | |||||||
VOCM small signal bandwidth 200 mVp-p |
High power | 4.8 | MHz | ||||
Mid power | 2.4 | ||||||
Low power | 0.64 | ||||||
VOCM gain | 1 | V/V | |||||
VOCM offset voltage | High power | ±1.62 | mV | ||||
Mid power | ±0.23 | ||||||
Low power | ±0.43 | ||||||
VOCM voltage range | All power levels | Low Swing | 1.8 | V | |||
High Swing | 8.2 | ||||||
VOCM input resistance | All power levels | Low Swing | 30 | KΩ | |||
High Swing | mid-supply |
PARAMETER | TEST CONDITIONS(2) | MIN(3) | TYP(4) | MAX(3) | UNIT | ||
---|---|---|---|---|---|---|---|
6.6-V DC CHARACTERISTICS | |||||||
VOS | Input offset voltage (RTI) |
High power | TA = 25°C | ±0.3 | ±3.5 | mV | |
At the temperature extremes | ±3.54 | ||||||
Mid power | TA = 25°C | ±0.1 | ±2.8 | ||||
At the temperature extremes | ±2.83 | ||||||
Low power | TA = 25°C | ±0.1 | ±2.5 | ||||
At the temperature extremes | ±2.52 | ||||||
TCVOS | Input offset voltage vs.temperature(5) | High power | ±0.7 | μV/°C | |||
Mid power | ±0.5 | ||||||
Low power | ±0.4 | ||||||
IB | Input bias current | High power | TA = 25°C | 1.4 | μA | ||
At the temperature extremes | 2.4 | ||||||
Mid power | TA = 25°C | 2.5 | |||||
At the temperature extremes | 3.0 | ||||||
Low power | TA = 25°C | 3.5 | |||||
At the temperature extremes | 3.7 | ||||||
AVOL | Open-loop gain | High power | 65 | 70 | dB | ||
Mid power | 73 | 76 | |||||
Low power | 72 | 75 | |||||
CMVR | Common-mode voltage range(7) | HP at CMRR ≥ 68 dB | 1.2 | 5.4 | V | ||
MP at CMRR ≥ 63 dB | 1.2 | 5.4 | |||||
LP at CMRR ≥ 79 dB | 1.2 | 5.4 | |||||
CMRR | Common-mode rejection ratio | DC, VOCM = 0,VID = 0, ΔVcm = ±0.2 V High power |
70 | 85 | dB | ||
Mid power | 86 | 117 | |||||
Low power | 81 | 113 | |||||
ZIND | Differential input resistance | VCM = mid-supply | 0.48 | MΩ | |||
CIND | Differential input capacitance | VCM = mid-supply | 1 | pF | |||
VO | Output swing (single-ended) |
High power | Low Swing | 0.84 | 0.77 | 5.76 | V |
High Swing | 0.84 | 5.83 | 5.76 | ||||
Mid power | Low Swing | 0.82 | 0.75 | 5.78 | |||
High Swing | 0.82 | 5.83 | 5.78 | ||||
Low power | Low Swing | 0.83 | 0.77 | 5.77 | |||
High Swing | 0.83 | 5.83 | 5.77 | ||||
ISHORT | Short-circuit current | Output shorted to mid-supply(6)
High power |
Low Swing | –30 | –49 | mA | |
High Swing | 54 | 83 | |||||
Mid power | Low Swing | –19 | –35 | ||||
High Swing | 40 | 64 | |||||
Low power | Low Swing | –6 | –15 | ||||
High Swing | 15 | 27 | |||||
PSRR | Power supply rejection ratio VS ±10% |
High power | 111 | dB | |||
Mid power | 117 | ||||||
Low power | 127 | ||||||
IS | Supply current | VEN = 5.775(8) | TA = 25°C | 14 | 16 | mA | |
At the temperature extremes | 18 | ||||||
VEN = 4.125(8) | TA = 25°C | 7 | 9 | ||||
At the temperature extremes | 10 | ||||||
VEN = 2.475(8) | TA = 25°C | 2 | 3 | ||||
At the temperature extremes | 4 | ||||||
PD | Power-down mode | Disable voltage threshold(8) | <1.225 | V | |||
Shutdown current | TA = 25°C | 0.55 | 0.65 | mA | |||
At the temperature extremes | 0.7 | ||||||
Enable pin current | 40 | μA | |||||
ten | Enable time | High power | 18 | ns | |||
Mid power | 22 | ||||||
Low power | 43 | ||||||
6.6-V AC CHARACTERISTICS | |||||||
SSBW | Small signal bandwidth 200 mVp-p differential |
High power | 116 | MHz | |||
Mid power | 85 | ||||||
Low power | 29 | ||||||
SR | Slew rate 2 Vp-p differential(9) |
High power | 488 | V/μs | |||
Mid power | 376 | ||||||
Low power | 166 | ||||||
trise | Rise time 2 Vp-p differential |
High power | 3.1 | ns | |||
Mid power | 4.2 | ||||||
Low power | 10.4 | ||||||
tfall | Fall time 2 Vp-p differential |
High power | 3.0 | ns | |||
Mid power | 4.0 | ||||||
Low power | 10.3 | ||||||
ts | 0.1% settling time 2 Vp-p |
2-V step, CL = 20 pF High power |
19 | ns | |||
Mid power | 25 | ||||||
Low power | 43 | ||||||
en | Input referred voltage noise at 10KHz |
High power | 4.5 | nV/√Hz | |||
Mid power | 4.8 | ||||||
Low power | 8 | ||||||
In | Input referred current noise at 10KHz |
High power | 1.7 | pA/√Hz | |||
Mid power | 1.2 | ||||||
Low power | 0.6 | ||||||
THD+N | Total harmonic distortion + noise 3 Vp-p at 1 KHz |
High power | 0.000098% | ||||
Mid power | 0.00011% | ||||||
Low power | 0.000089% | ||||||
HD2 | 2nd harmonic distortion 3 Vp-p, 1 KHz |
High power | –124.7 | dBc | |||
Mid power | –122.8 | ||||||
Low power | –117.2 | ||||||
2nd harmonic distortion 6 Vp-p, 1 KHz |
High power | –118.9 | dBc | ||||
Mid power | –117.6 | ||||||
Low power | –114.7 | ||||||
HD3 | 3rd harmonic distortion 3 Vp-p, 1 KHz |
High power | –139.9 | dBc | |||
Mid power | -141.9 | ||||||
Low power | –133.3 | ||||||
3rd harmonic distortion 6Vp-p, 1KHz |
High power | –121.4 | dBc | ||||
Mid power | –125.3 | ||||||
Low power | –124.5 | ||||||
6.6-V VOCM INPUT CHARACTERISTICS | |||||||
VOCM small signal bandwidth 200mVp-p |
High power | 4.5 | MHz | ||||
Mid power | 2.2 | ||||||
Low power | 0.6 | ||||||
VOCM gain | 1 | V/V | |||||
VOCM offset voltage | High power | ±0.97 | mV | ||||
Mid power | ±0.43 | ||||||
Low power | ±0.89 | ||||||
VOCM voltage range | All power levels | Low Swing | 1.2 | V | |||
High Swing | 5.4 | ||||||
VOCM input resistance | All power levels | Low Swing | 30 | KΩ | |||
High Swing | mid-supply |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | ||
---|---|---|---|---|---|---|---|
5-V DC CHARACTERISTICS | |||||||
VOS | Input offset voltage (RTI) |
High power | TA = 25°C | ±0.2 | ±3.2 | mV | |
At the temperature extremes | ±3.6 | ||||||
Mid power | TA = 25°C | ±0.1 | ±2.0 | ||||
At the temperature extremes | ±2.3 | ||||||
Low power | TA = 25°C | ±0.1 | ±2.0 | ||||
At the temperature extremes | ±2.3 | ||||||
TCVOS | Input offset voltage vs.temperature(4) | High power | ±0.7 | μV/°C | |||
Mid power | ±0.5 | ||||||
Low power | ±0.4 | ||||||
IB | Input bias current | High power | TA = 25°C | 1.5 | μA | ||
At the temperature extremes | 1.6 | ||||||
Mid power | TA = 25°C | 2.5 | |||||
At the temperature extremes | 3.0 | ||||||
Low power | TA = 25°C | 3.5 | |||||
At the temperature extremes | 3.7 | ||||||
AVOL | Open-loop gain | High power | 63 | 68 | dB | ||
Mid power | 71 | 75 | |||||
Low power | 68 | 75 | |||||
CMVR | Common-mode voltage range(5) | HP at CMRR ≥ 60 dB | 1.15 | 3.85 | V | ||
MP at CMRR ≥ 86 dB | 1.15 | 3.85 | |||||
LP at CMRR ≥ 80 dB | 1.15 | 3.85 | |||||
CMRR | Common-mode rejection ratio | DC, VOCM = 0,VID = 0, ΔVcm = ±0.2 V High power |
63 | 79 | dB | ||
Mid power | 87 | 114 | |||||
Low power | 82 | 114 | |||||
ZIND | Differential input resistance | VCM = mid-supply | 0.48 | MΩ | |||
CIND | Differential input capacitance | VCM = mid-supply | 1 | pF | |||
VO | Output swing (single-ended) |
High power | Low Swing | 0.82 | 0.77 | 4.18 | V |
High Swing | 0.82 | 4.23 | 4.18 | ||||
Mid power | Low Swing | 0.82 | 0.75 | 4.18 | |||
High Swing | 0.82 | 4.25 | 4.18 | ||||
Low power | Low Swing | 0.83 | 0.77 | 4.17 | |||
High Swing | 0.83 | 4.23 | 4.17 | ||||
ISHORT | Short-circuit current | Output shorted to mid-supply(6)
High power |
Low Swing | –25 | –42 | mA | |
High Swing | 44 | 72 | |||||
Mid power | Low Swing | –16 | –31 | ||||
High Swing | 34 | 57 | |||||
Low power | Low Swing | –5 | –13 | ||||
High Swing | 12 | 23 | |||||
PSRR | Power supply rejection ratio VS ±10% |
High power | 117 | dB | |||
Mid power | 120 | ||||||
Low power | 111 | ||||||
IS | Supply current | VEN = 4.375(7) | TA = 25°C | 13 | 15 | mA | |
At the temperature extremes | 17 | ||||||
VEN = 3.125(7) | TA = 25°C | 7 | 9 | ||||
At the temperature extremes | 10 | ||||||
VEN = 1.875(7) | TA = 25°C | 2 | 3 | ||||
At the temperature extremes | 4 | ||||||
PD | Power-down mode | Disable voltage threshold(7) | <1.025 | V | |||
Shutdown current | TA = 25°C | 0.50 | 0.85 | mA | |||
At the temperature extremes | 0.90 | ||||||
Enable pin current | 15 | μA | |||||
ten | Enable time | High power | 20 | ns | |||
Mid power | 22 | ||||||
Low power | 50 | ||||||
5-V AC CHARACTERISTICS | |||||||
SSBW | Small signal bandwidth 200 mVp-p differential |
High power | 114.5 | MHz | |||
Mid power | 84 | ||||||
Low power | 28 | ||||||
SR | Slew rate 2 Vp-p differential(8) |
High power | 476 | V/μs | |||
Mid power | 366 | ||||||
Low power | 160 | ||||||
trIse | Rise time 2 Vp-p differential |
High power | 3.2 | ns | |||
Mid power | 4.3 | ||||||
Low power | 10.8 | ||||||
tfall | Fall time 2 Vp-p differential |
High power | 3.1 | ns | |||
Mid power | 4.1 | ||||||
Low power | 10.7 | ||||||
ts | 0.1% settling time 2 Vp-p |
2-V step, CL = 20 pF High power |
19 | ns | |||
Mid power | 24 | ||||||
Low power | 48 | ||||||
en | Input referred voltage noise | f = 10 kHz High power |
4.5 | nV/√Hz | |||
Mid power | 4.8 | ||||||
Low power | 8 | ||||||
In | Input referred current noise | f = 10 kHz High power |
1.8 | pA/√Hz | |||
Mid power | 1.2 | ||||||
Low power | 0.6 | ||||||
THD+N | Total harmonic distortion + noise 3 Vp-p at 1 KHz |
High power | 0.000107% | ||||
Mid power | 0.000114% | ||||||
Low power | 0.000192% | ||||||
HD2 | 2nd harmonic distortion 3 Vp-p, 1 KHz |
High power | –125.3 | dBc | |||
Mid power | –122.6 | ||||||
Low power | –117.0 | ||||||
HD3 | 3rd harmonic distortion 3 Vp-p, 1 KHz |
High power | –125.5 | dBc | |||
Mid power | –130.0 | ||||||
Low power | –128.7 | ||||||
5-V VOCM INPUT CHARACTERISTICS | |||||||
VOCM small signal bandwidth 200 mVp-p |
High power | 4.4 | MHz | ||||
Mid power | 2.2 | ||||||
Low power | 0.56 | ||||||
VOCM gain | 1 | V/V | |||||
VOCM offset voltage | High power | ±0.46 | mV | ||||
Mid power | ±0.53 | ||||||
Low power | ±0.11 | ||||||
VOCM voltage range | All power levels | Low Swing | 1.15 | V | |||
High Swing | 3.85 | ||||||
VOCM input resistance | All power levels | Low Swing | 30 | KΩ | |||
High Swing | mid-supply |
The LMP8350 is a fully-differential voltage feedback amplifier designed to drive precision differential ADC converters. The LMP8350, though fully integrated for ultimate balance and distortion performance, functionally provides three channels. Two of these channels are the V+ and V− signal path channels, which function similarly to inverting mode operational amplifiers and are the primary signal paths.
The third channel is the common-mode (VOCM) feedback circuit. This is the circuit that sets the output common mode as well as driving the V+ and V− outputs to be equal magnitude and opposite phase, even when only one of the two input channels is driven. The common-mode feedback circuit allows for single-ended to differential operation. The output common-mode voltage is set by applying the appropriate voltage to the VOCM pin.
Although the LMP8350 has a unity gain bandwidth of over 200 MHz, it is primarily intended for lower sample rate, high-precision ADCs with baseband analog input signal bandwidths in the DC to <1 MHz range (not to be confused with sampling rate). The high open-loop bandwidth of the LMP8350 is used to provide ultra low distortion and fast settling times. Maximum power bandwidth is limited by the internal output common-mode feedback path, which is limited to 1 MHz to 5 MHz. Operation with input signals above 1 MHz with near full output swings can cause random shifts in the output common mode and possible AC instabilities. For this reason, the LMP8350 is not intended to be used wide bandwidth (> 1 MHz) signal paths. Single-ended inputs rely on the common-mode signal path and will have a bandwidth limited to that of the internal common-mode buffer.
The LMP8350 is protected against electrostatic discharge (ESD) on all pins. The LMP8350 will survive 2000-V human body model and 200-V machine model events. Under normal operation, the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMP8350 is driven by a large signal while the device is powered down the ESD diodes will conduct. The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to conserve power and still prevent unexpected operation.
The LMP8350 is equipped with a four-level enable (EN) pin to select one of three power modes or shutdown. These modes are selected by applying the appropriate voltage to the EN pin.
Each power level has a corresponding performance level. The high power mode will have the best overall BW and distortion performance, but at the cost of higher supply current and some DC accuracy. The low power mode has the lowest supply current, but with a noticeable loss of AC performance and output drive capabilities. The mid-power mode provides the best balance of AC and precision DC specifications. In disable mode, the amplifier is shutdown and the output stage goes into a high impedance state. Table 1 summarizes these performance trade-offs.
MODE | VS | –3dB BW (MHz) |
HD2 (dBc) |
NOISE (nV/Hz) |
SR (V/µS) |
TYP VOS (mV) |
---|---|---|---|---|---|---|
High | 10 | 118 | –124.7 | 4.6 | 507 | 0.6 |
6.6 | 116 | –124.7 | 4.5 | 488 | 0.3 | |
5 | 114 | –125.5 | 4.5 | 476 | 0.2 | |
Med | 10 | 87 | –122.8 | 4.8 | 393 | 0.08 |
6.6 | 85 | –122.8 | 4.8 | 376 | 0.1 | |
5 | 84 | –122.6 | 4.8 | 366 | 0.1 | |
Low | 10 | 31 | –117.2 | 8 | 178 | 0.1 |
6.6 | 29 | –117.2 | 8 | 166 | 0.1 | |
5 | 28 | –117 | 8 | 160 | 0.1 |
To set the mode, internally the voltage at the EN pin is compared against the total supply voltage (VS) and sets the current consumption as shown in the table below. The EN pin voltage is referenced to the V- pin.
VEN
(VS = V+ - V-) |
POWER MODE |
VEN AT 10 V | VEN AT 6.6 V | VEN AT 5 V | IS
mA |
---|---|---|---|---|---|
7/8 × VS | High | 8.75 | 5.775 | 4.375 | 13 to 15 |
5/8 × VS | Med | 6.25 | 4.125 | 3.125 | 7 to 9 |
3/8 × VS | Low | 3.75 | 2.475 | 1.875 | 2 to 3 |
1/8 × VS | Disable | 1.25 | 0.825 | 0.625 | < 1 |
The enable pin should not be allowed to float. If the enable pin is not used it can be tied to V+ to select the high power mode or set with two resistors.
Each power setting has a ±400-mV tolerance at each level, though TI recommends to keep the set voltage within the center of the range as performance may vary near the transition zones.
During shutdown, both outputs are in a high impedance state, so the feedback and gain set resistors will then set the input and output impedance of the circuit. For this reason input to output isolation will be poor in the disabled state.
The voltage at the EN pin can be generated with a resistive voltage divider or a buffer connected to a voltage source or a DAC. Figure 34 shows how to generate EN voltage with a resistive voltage divider.
Values of RA and RB can be calculated to achieve the voltages in Table 2, however their sum should be below
50 kΩ to keep the voltage at the enable pin stable. Recommended values for RA and RB are given in Table 3.
MODE | 10 V | 6.6 V | 5 V | VEN |
---|---|---|---|---|
High Power | RA = 0 RB = inf |
RA = 0 RB = inf |
RA = 0 RB = inf |
> 7/8 VS |
Mid Power | RA = 18 K RB = 30 K |
RA = 18 K RB = 30 K |
RA = 18 K RB = 30 K |
5/8 VS |
Low Power | RA = 33 K RB = 18 K |
RA = 33 K RB = 18 K |
RA = 33 K RB = 18 K |
3/8 VS |
Shutdown | RA = Inf RB = 0 |
RA = Inf RB = 0 |
RA = Inf RB = 0 |
< 1/8 VS |
Output common-mode voltage is set by the VOCM pin. Both outputs will be offset in the same direction (phase) by an amount equal to the applied VOCM voltage.
The VOCM pin, if left unconnected, will self-bias to mid-supply. Two internal 60-kΩ resistors set this midpoint. These resistors are shown in Figure 28.
The equivalent resistance looking into the VOCM pin will look like 30 kΩ to mid-supply, plus about ±700 nA for internal base currents (which scales with power mode and supply current). If left floating, the VOCM input should be bypassed to ground with a 0.1-µF ceramic capacitor.
If a different output common-mode voltage is desired, the VOCM pin should be driven by a clean, low impedance source to override the internal divider resistors. The VOCM pin should be bypassed to ground with a 0.1-µF ceramic capacitor. It should be noted that any signal or noise-coupling into the VOCM will be passed as common-mode noise and may result in the loss of dynamic range, degraded CMRR, degraded balance and higher distortion. The VOCM pin is primarily intended as a DC bias path and is not intended for use as a signal path.
For applications that can tolerate slight shifts in the VOCMvoltage over temperature, it is also possible to use a single resistor to program the VOCM voltage by paralleling one of the internal resistors to change the ratio.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LMP8350 will perform best when used with split supplies and in a fully-differential configuration. See Figure 29 for recommend circuits.
The circuit shown in Figure 29 is a typical fully-differential application as might be used to drive a Sigma Delta ADC. In this circuit, closed-loop gain is calculated by Equation 1:
where
For all the applications in this data sheet , VIN is presumed to be the voltage presented to the circuit by the signal source. For differential signals this will be the difference of the signals on each input (which will be double the magnitude of each individual signal), while in single-ended inputs it will just be the driven input signal.
When fed with a differential signal, the LMP8350 provides excellent distortion, balance and common-mode rejection, provided the resistors RF, RG and any input termination resistors (RT) are well-matched and strict symmetry is observed in board layout. With a DC CMRR of over 80 dB, the DC and low frequency CMRR of most circuits will be dominated by the external resistor matching and board trace resistance. At low distortion levels, board layout symmetry and supply bypassing become a factor as well. It is assumed throughout this document that RF1 = RF2 and RG1 = RG2 for maximum channel symmetry
Precision resistors of at least 0.1% accuracy or better are recommended and careful board layout will also be required for optimum performance.
Operation with RF feedback resistors as low as 300 Ω is possible in the high and medium power modes. This will slightly improve the noise and bandwidth results. However, feedback resistors with RF values of less than 1 KΩ should be avoided in the low power mode due to the reduced output drive current capabilities. If low value resistors (< 300 Ω) must be used in the low power mode, the maximum output swing will need to be limited.
The resistors RO help keep the amplifier stable when presented with a load CL, as is common when driving an analog to digital converter (ADC).
With up to 15 VPP differential output voltage swing and 80 mA of linear drive current, the LMP8350 makes an excellent precision cable driver as shown in Figure 30. The LMP8350 is also suitable for driving differential cables from a single-ended source.
As shown in Figure 31, the input common-mode voltage is less than the output common voltage. It is set by current flowing through the feedback network from the device output. The input common-mode voltage range places constraints on gain settings. The input common-mode voltage is calculated in Equation 2. Possible solutions to this limitation include AC coupling the input signal, using split power supplies and limiting stage gain. AC coupling with single-supply is shown in Figure 32.
In Figure 31 the differential closed loop gain is = AV= RF/RG.
NOTE
In single-ended to differential operation VIN is measured single ended while VOUT is measured differentially. This means that gain is really one-half, or 6 dB, less when measured on either of the output pins separately.
Analog to digital converters (ADC) present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. As well, there are usually current spikes associated with switched capacitor or sample and hold circuits. Figure 33 shows a typical circuit for driving an ADC. The two resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In addition, the resistors form part of a lowpass filter which helps to provide anti alias and noise reduction functions. The CS capacitor helps to smooth the current spikes associated with the internal switching circuits of the ADC and also are a key component in the lowpass filtering of the ADC input. The capacitor should be a low distortion capacitor, such as an NPO, to avoid causing significant distortion terms. In the circuit of Figure 33, the cutoff frequency of the filter is calculated by Equation 3. This should be slightly less than the sampling frequency.
NOTE
The ADC input capacitance must be factored into the frequency response of the input filter. Also as shown in Figure 33, the input capacitance to many ADCs is variable based on the clock cycle. For lower-speed, precision ADC's, the external cap is generally sized to ten times the internal sampling capacitor value. See the data sheet for your particular ADC for details.
The amplifier and ADC muist be located as close together as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on the output traces, and the ADC is sensitive to high-frequency noise that may couple in on its input lines. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the Nyquist range (DC to Fs/2). See AN-236 (SNAA079) for more details on the subsampling process and the requirements this imposes on the filtering necessary in your system.
As noted in the Driving Analog to Digital Converters section, capacitive loads should be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500 Ω or higher. A typical ADC has capacitive components of around 8 to 18 pF, and the resistive component could be 1000 Ω or higher. If driving a transmission line, such as a twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance.
Figure 34 shows a typical application where an LMP8350 is used to produce a differential signal from a single-ended source.
Compared to a differential input, using a single-ended input will reduce gain by 1/2, so that the closed-loop gain will be calculated by Equation 4:
In single-ended input operation the output common-mode voltage is set by the VOCM pin. Also, In this mode the common-mode feedback circuit must recreate the signal that is not present on the unused differential input pin. The common-mode feedback circuit is responsible for ensuring balanced output with a single-ended input.
Balance error is defined as the amount of input signal that couples into the output common mode. It is measured as the undesired output common-mode swing divided by the signal on the input. Balance error can be caused by either a channel to channel gain error, or phase error. Either condition will produce a common-mode shift. The overall bandwidth is limited due to the VOCM buffer bandwidth limitations in this configuration.
Supply and VOCM pin bypassing are also critical in this mode of operation.
For a single-ended input differential output configuration Figure 34, component value selection is dictated by the gain and input resistance desired. Figure 35 shows the OUT+ and OUT– relative to the single ended voltage signal input +. Depending on the feedback resistor values, the amplitude gain of the OUT+ and OUT– will vary.
The LMP8350 requires supply bypassing capacitors as shown in Figure 36 and Figure 37 for fastest settling time and overall stability.
The 0.01-µF and 0.1-µF capacitors should be leadless surface mount (SMT) ceramic capacitors and should be no more than 3 mm from the supply pins. The SMT capacitors should be connected directly to a ground plane. Thin traces or small vias will reduce the effectiveness of bypass capacitors.
Also shown in Figure 36 and Figure 37 is a capacitor from the VOCM pin to ground. The VOCM pin sets the output common-mode voltage. Any noise on this input is transferred directly to the output. The VOCM pin should be bypassed even if the pin in not used. There is an internal resistive divider on chip to set the output common-mode voltage to the midpoint of the supply pins. The impedance looking into this pin is approximately 30 kΩ. If a different output common-mode voltage is desired drive this pin with a clean, accurate voltage reference.