SNVS522I August   2007  – August 2015 LP38501-ADJ , LP38503-ADJ

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Stability and Phase Margin
      2. 7.3.2 Load Transient Response
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Reverse Current Path
      5. 7.3.5 Short-Circuit Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Operation (LP38501-ADJ Only)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Setting The Output Voltage
        5. 8.2.2.5 RFI/EMI Susceptibility
        6. 8.2.2.6 Output Noise
        7. 8.2.2.7 Power Dissipation/Heatsinking
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or Aluminum Capacitors
  • Stable With 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 3 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A Grade)
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE (EN) Pin (LP38501 only)
  • –40°C to +125°C Operating Temperature Range

2 Applications

  • ASIC Power Supplies In:
    •  Printers, Graphics Cards, DVD Players
    •  Set Top Boxes, Copiers, Routers
  • DSP and FPGA Power Supplies
  • SMPS Regulator
  • Conversion from 3.3-V or 5-V Rail

3 Description

TI's FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38501 and LP38503 series of LDOs operate from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38501-ADJ and LP38503-ADJ have low quiescent currents that change little with load current.

  • GND Pin Current: Typically 2 mA at 3-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low.
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: A grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP38501
LP38503		 DDPAK/TO-263 (5) 10.16 mm x 8.42 mm
TO-263 (5) 10.16 mm x 9.85 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuits

LP38501-ADJ LP38503-ADJ app_circuit_1_snvs522.png
*Minimum capacitance required (see Application and Implementation).
LP38501-ADJ LP38503-ADJ app_circuit_02_snvs522.png
*Minimum capacitance required (see Application and Implementation).