SNVSC52 December   2021 LP5864

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Time-Multiplexing Matrix
      2. 8.3.2 Analog Dimming (Current Gain Control)
      3. 8.3.3 PWM Dimming
      4. 8.3.4 ON and OFF Control
      5. 8.3.5 Data Refresh Mode
      6. 8.3.6 Full Addressable SRAM
      7. 8.3.7 Protections and Diagnostics
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Program Procedure
      5. 9.2.5 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • LED matrix topology:

    • 18 constant current sinks with 4 scan switches for 72 LED dots
    • Configurable for 1 to 4 scan switches

  • Operating voltage range:
    • VCC/VLED range: 2.7 V to 5.5 V
    • Logic pins compatible with 1.8 V, 3.3 V, and 5 V
  • 18 constant current sinks with high precision:
    • 0.1 mA–50 mA per current sink when VCC ≥ 3.3 V
    • Device-to-device error: ±5%
    • Channel-to-channel error: ±5%
    • Phase-shift for balanced transient power
  • Ultra-low power consumption:
    • Shutdown mode: ICC ≤ 2 uA when EN = Low
    • Standby mode: ICC ≤ 10 uA when EN = High and CHIP_EN = 0 (data retained)
    • Active mode: ICC = 3 mA (typ.) when channel current = 5 mA
  • Flexible dimming options:
    • Individual ON and OFF control for each LED dot
    • Analog dimming (current gain control)
      • Global 3-bit Maximum Current (MC) setting for all LED dots
      • 3 groups of 7-bit Color Current (CC) setting for red, green, and blue
      • Individual 8-bit Dot Current (DC) setting for each LED dot
    • PWM dimming with audible-noise-free frequency
      • Global 8-bit PWM dimming for all LED dots
      • 3 programmable groups of 8-bit PWM dimming for LED dot arbitrary mapping
      • Individual 8-bit or 16-bit PWM dimming for each LED dot
  • Full addressable SRAM to minimize data traffic
  • Individual LED dot open and short detection
  • Deghosting and low brightness compensation
  • Interface options:
    • 1-MHz (max.) I2C interface when IFS = Low
    • 12-MHz (max.) SPI interface when IFS = High