The OPA1652 (dual) and OPA1654 (quad) FET-input operational amplifiers achieve a low 4.5-nV/√Hz noise density with an ultra-low distortion of 0.00005% at 1 kHz. The OPA1652 and OPA1654 op amps offer rail-to-rail output swing to within 800 mV with a 2-kΩ load, which increases headroom and maximizes dynamic range. These devices also have a high output drive capability of ±30 mA.
These devices operate over a very-wide-supply range of ±2.25 V to ±18 V, or 4.5 V to 36 V, on only 2 mA of supply current per channel. The OPA1652 and OPA1654 op amps are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions.
These devices also feature completely independent circuitry for lowest crosstalk and freedom from interactions between channels, even when overdriven or overloaded.
The OPA1652 and OPA1654 temperature ranges are specified from –40°C to +85°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
OPA1652 | SOIC (8) | 4.90 mm × 3.91 mm |
VSSOP (8) | 3.00 mm × 3.00 mm | |
WSON (8) | 3.00 mm × 3.00 mm | |
OPA1654 | SOIC (14) | 8.65 mm × 3.91 mm |
TSSOP (14) | 5.00 mm × 4.40 mm |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
V– | 4 | — | Negative (lowest) power supply |
V+ | 8 | — | Positive (highest) power supply |
Thermal pad | — | — | Exposed thermal die pad on underside of DRG package; connect thermal die pad to V–. Soldering the thermal pad improves heat dissipation and provides specified performance |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
–IN C | 9 | I | Inverting input, channel C |
+IN D | 10 | I | Noninverting input, channel C |
–IN D | 13 | I | Inverting input, channel D |
+IN D | 12 | I | Noninverting input, channel D |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
OUT C | 8 | O | Output, channel C |
OUT D | 14 | O | Output, channel D |
V– | 11 | — | Negative (lowest) power supply |
V+ | 4 | — | Positive (highest) power supply |