SBOS900B September   2018  – June 2019 OPA2156

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Low Input Voltage Noise Spectral Density
      2.      OPA2156 Transimpedance Configuration
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA2156
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Phase Reversal Protection
      2. 7.3.2 Electrical Overstress
      3. 7.3.3 Thermal Considerations
      4. 7.3.4 Thermal Shutdown
      5. 7.3.5 Common-Mode Voltage Range
      6. 7.3.6 Overload Recovery
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Slew Rate Limit for Input Protection
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Ultra-low noise: 3 nV/√Hz at 10 kHz
  • Low offset voltage: ±25 µV
  • Low offset voltage drift: ±0.5 µV/°C
  • Low bias current: ±5 pA
  • Common-Mode Rejection: 120dB
  • Low Noise: 3 nV/√Hz at 10 kHz
  • Wide bandwidth: 25-MHz GBW
  • Open-loop voltage gain: 154 dB
  • High output current: 100 mA
  • Rail-to-rail input and output
  • High slew rate: 40 V/µs
  • Fast settling time: 600 ns (10-V step, 0.01%)
  • Wide supply: ±2.25 V to ±18 V, 4.5 V to 36 V
  • Industry standard packages:
    • Dual in SOIC-8 and VSSOP-8