SLOS856B June 2013 – May 2017 OPA2322-Q1 , OPA322-Q1 , OPA4322-Q1
PRODUCTION DATA.
The OPAx322-Q1 series consists of single-, dual-, and quad-channel CMOS operational amplifiers featuring low noise and rail-to-rail inputs and outputs optimized for low-power, single-supply applications. Specified over a wide supply range from 1.8 V to 5.5 V, the low quiescent current of only 1.5 mA per channel makes these devices well-suited for power-sensitive applications.
The combination of very-low noise (8.5 nV√Hz at 1 kHz), high-gain bandwidth (20 MHz), and fast slew rate (10 V/μs) make the OPAx322-Q1 family ideal for a wide range of applications, including signal conditioning and sensor amplification requiring high gains. Featuring low THD+N, the OPAx322-Q1 family is also excellent for consumer audio applications, particularly for single-supply systems.
The OPA322-Q1 (single version) is available in 5-pin SOT-23 package, while the OPA2322-Q1 (dual version) is offered in a 8-pin VSSOP package. The OPA4322-Q1 (quad version) is available in a 14-pin TSSOP package. All versions are specified for operation from –40°C to +125°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
OPA322-Q1 | SOT-23 (5) | 2.90 mm × 1.60 mm |
OPA2322-Q1 | VSSOP (8) | 3.00 mm × 3.00 mm |
OPA4322-Q1 | TSSOP (14) | 5.00 mm × 4.40 mm |
Changes from A Revision (June 2013) to B Revision
Changes from * Revision (June 2013) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN | 4 | I | Inverting input |
+IN | 3 | I | Noninverting input |
OUT | 1 | O | Output |
V– | 2 | — | Negative (lowest) power supply |
V+ | 5 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
V– | 4 | — | Negative (lowest) power supply |
V+ | 8 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
–IN C | 9 | I | Inverting input, channel C |
+IN C | 10 | I | Noninverting input, channel C |
–IN D | 13 | I | Inverting input, channel D |
+IN D | 12 | I | Noninverting input, channel D |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
OUT C | 8 | O | Output, channel C |
OUT D | 14 | O | Output, channel D |
V– | 11 | — | Negative (lowest) power supply |
V+ | 4 | — | Positive (highest) power supply |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | Supply voltage, VS = (V+) – (V–) | 6 | V | |
Signal input pins(2) | (V–) – 0.5 | (V+) + 0.5 | V | |
Current | Signal input pins(2) | –10 | 10 | mA |
Output short-circuit(3) | Continuous | |||
Temperature | Junction, TJ | 150 | °C | |
Storage, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±4000 | V |
Charged-device model (CDM), per AEC Q100-011 | ±1000 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VS | Specified voltage | 1.8 | 5.5 | V |
TA | Specified temperature | –40 | 125 | °C |
THERMAL METRIC(1) | OPA322-Q1 | UNIT | |
---|---|---|---|
DBV (SOT-23) | |||
5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 219.3 | °C/W |
RθJC(top) | Junction-to-case(top) thermal resistance | 107.5 | °C/W |
RθJB | Junction-to-board thermal resistance | 57.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 7.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 56.9 | °C/W |
RθJC(bot) | Junction-to-case(bottom) thermal resistance | — | °C/W |
THERMAL METRIC(1) | OPA2322-Q1 | UNIT | |
---|---|---|---|
DGK (VSSOP) | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 174.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 43.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 95 | °C/W |
ψJT | Junction-to-top characterization parameter | 2 | °C/W |
ψJB | Junction-to-board characterization parameter | 93.5 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | °C/W |
THERMAL METRIC(1) | OPA4322-Q1 | UNIT | |
---|---|---|---|
PW (TSSOP) | |||
14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 109.8 | °C/W |
RθJC(top) | Junction-to-case(top) thermal resistance | 34.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 52.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 2.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 51.8 | °C/W |
RθJC(bot) | Junction-to-case(bottom) thermal resistance | — | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | ||||||||
VOS | Input offset voltage | 0.5 | 2 | mV | ||||
dVOS/dT | vs temperature | VS = 5.5 V | 1.8 | 6 | μV/°C | |||
PSR | vs power supply | VS = 1.8 V to 5.5 V | TA = 25°C | 10 | 50 | μV/V | ||
TA = –40°C to 125°C | 20 | 65 | ||||||
Channel separation | at 1 kHz | 130 | dB | |||||
INPUT VOLTAGE | ||||||||
VCM | Common-mode voltage range | (V–) – 0.1 | (V+) + 0.1 | V | ||||
CMRR | Common-mode rejection ratio | (V–) – 0.1 V < VCM < (V+) + 0.1 V | TA = 25°C | 90 | 100 | dB | ||
TA = –40°C to 125°C | 90 | |||||||
INPUT BIAS CURRENT | ||||||||
IB | Input bias current | TA = 25°C | ±0.2 | ±10 | pA | |||
TA = –40°C to 85°C | ±50 | |||||||
OPA322-Q1: TA = –40°C to 125°C |
±800 | |||||||
OPA2322-Q1: TA = –40°C to 125°C |
±400 | |||||||
OPA4322-Q1: TA = –40°C to 125°C |
±400 | |||||||
IOS | Input offset current | TA = 25°C | ±0.2 | ±10 | pA | |||
TA = –40°C to 85°C | ±50 | |||||||
TA = –40°C to 125°C | ±400 | |||||||
NOISE | ||||||||
Input voltage noise | f = 0.1 Hz to 10 Hz | 4.5 | μVPP | |||||
en | Input voltage noise density | f = 1 kHz | 8.5 | nV/√Hz | ||||
f = 10 kHz | 7 | |||||||
in | Input current noise density | f = 1 kHz | 0.6 | fA/√Hz | ||||
INPUT CAPACITANCE | ||||||||
Differential | 5 | pF | ||||||
Common-mode | 4 | pF | ||||||
OPEN-LOOP GAIN | ||||||||
AOL | Open-loop voltage gain | 0.1 V < VO < (V+) – 0.1 V RL = 10 kΩ |
100 | 130 | dB | |||
PM | Phase margin | VS = 5 V CL = 50 pF |
47 | ° | ||||
FREQUENCY RESPONSE | ||||||||
GBP | Gain bandwidth product | VS = 5 V CL = 50 pF, unity gain |
20 | MHz | ||||
SR | Slew rate | VS = 5 V CL = 50 pF, G = 1 |
10 | V/μs | ||||
tS | Settling time | VS = 5 V CL = 50 pF, to 0.1%, 2-V step, G = 1 |
0.25 | μs | ||||
VS = 5 V CL = 50 pF, to 0.01%, 2-V step, G = 1 |
0.32 | |||||||
Overload recovery time | VS = 5 V CL = 50 pF VIN × G > VS |
100 | ns | |||||
THD+N | Total harmonic distortion + noise(1) | VS = 5 V CL = 50 pF VO = 4 VPP, G = 1, f = 10 kHz RL = 10 kΩ |
0.0005% | |||||
VS = 5 V, CL = 50 pF, VO = 2 VPP, G = 1, f = 10 kHz RL = 600 Ω |
0.0011% | |||||||
OUTPUT | ||||||||
VO | Voltage output (swing from both rails) | RL = 10 kΩ | TA = 25°C | 10 | 20 | mV | ||
TA = –40°C to 125°C | 30 | |||||||
ISC | Short-circuit current | VS = 5.5 V | ±65 | mA | ||||
CL | Capacitive load drive | See Typical Characteristics | ||||||
RO | Open-loop output resistance | IO = 0 mA f = 1 MHz |
90 | Ω | ||||
POWER SUPPLY | ||||||||
VS | Specified voltage range | 1.8 | 5.5 | V | ||||
IQ | Quiescent current per amplifier | OPA322-Q1: IO = 0 mA VS = 5.5 V |
TA = 25°C | 1.6 | 1.9 | mA | ||
TA = –40°C to 125°C | 2 | |||||||
OPA2322-Q1: IO = 0 mA VS = 5.5 V |
TA = 25°C | 1.5 | 1.75 | |||||
TA = –40°C to 125°C | 1.85 | |||||||
OPA4322-Q1: IO = 0 mA VS = 5.5 V |
TA = 25°C | 1.4 | 1.65 | |||||
TA = –40°C to 125°C | 1.75 | |||||||
Power-on time | VS+ = 0 V to 5 V, to 90% IQ level | 28 | μs |
The OPAx322-Q1 family of operational amplifiers (op amps) are high-speed precision amplifiers well-suited to drive 12-, 14-, and 16-bit analog-to-digital converters. Low-output impedance with flat frequency characteristics and zero-crossover distortion circuitry enable high linearity over the full input common-mode range, achieving true rail-to-rail input from a 1.8-V to 5.5-V single-supply.
The OPAx322-Q1 series op amps are unity-gain stable and can operate on a single-supply voltage (1.8 V to 5.5 V), or a split-supply voltage (±0.9 V to ±2.75 V), which makes the op amps highly versatile and easy to use. The power-supply pins must have local bypass ceramic capacitors (typically 0.001 μF to 0.1 μF). These amplifiers are fully specified from 1.8 V to 5.5 V and over the extended temperature range from –40°C to +125°C. Parameters that can exhibit variance with regard to operating voltage or temperature are presented in Typical Characteristics.
The OPAx322-Q1 incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case of input and output pins, this protection primarily consists of current-steering diodes connected between the input and power-supply pins. These ESD protection diodes also provide in-circuit input overdrive protection, as long as the current is limited to 10 mA as stated in Absolute Maximum Ratings. Many input signals are inherently current-limited to less than 10 mA; therefore, a limiting resistor is not required. Figure 26 shows how a series input resistor (RS) may be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and the value must be kept to the minimum in noise-sensitive applications.
The OPAx322-Q1 family of op amps are designed to be immune to phase reversal when the input pins exceed the supply voltages, which provides further in-system stability and predictability. Figure 27 shows the input voltage exceeding the supply voltage without any phase reversal.
For optimum settling time and stability with high-impedance feedback networks, it may be necessary to add a feedback capacitor across the feedback resistor (RF), as shown in Figure 28. This capacitor compensates for the zero created by the feedback network impedance and the OPAx322-Q1 input capacitance (and any parasitic layout capacitance). The effect becomes more significant with higher impedance networks.
NOINDENT:
NOTE: Where CIN is equal to the OPAx322-Q1 input capacitance (approximately 9 pF) plus any parasitic layout capacitance.For the circuit shown in Figure 28, the value of the variable feedback capacitor must be selected so that the input resistance times the input capacitance of the OPAx322-Q1 (typically 9 pF) plus the estimated parasitic layout capacitance equals the feedback capacitor times the feedback resistor with Equation 1.
where
The capacitor value can be adjusted until optimum performance is obtained.
Operational amplifiers vary in susceptibility to electromagnetic interference (EMI). If conducted EMI enters the device, the DC offset observed at the amplifier output may shift from the nominal value while EMI is present. This shift is a result of signal rectification associated with the internal semiconductor junctions. While all operational amplifier pin functions can be affected by EMI, the input pins are likely to be the most susceptible. The OPAx322-Q1 operational amplifier family incorporates an internal input low-pass filter that reduces the amplifier response to EMI. Both common-mode and differential mode filtering are provided by the input filter. The filter is designed for a cutoff frequency of approximately 580 MHz (–3 dB), with a roll-off of 20 dB per decade.
The open-loop output impedance of the OPAx322-Q1 common-source output stage is approximately 90 Ω. When the op amp is connected with feedback, the loop gain significantly reduces this value. For each decade rise in the closed-loop gain, the loop gain is reduced by the same amount, which results in a tenfold increase in effective output impedance. While the OPAx322-Q1 output impedance remains flat over a wide frequency range. At higher frequencies the output impedance rises as the open-loop gain of the op amp drops. However, at these frequencies the output becomes capacitive as a result of parasitic capacitance. This characteristic prevents the output impedance from becoming too high, which can cause stability problems when driving large capacitive loads. As mentioned previously, the OPAx322-Q1 has excellent capacitive load drive capability for an op amp with a bandwidth of this value.
The OPAx322-Q1 is designed to be used in applications where driving a capacitive load is required. As with all op amps, there may be specific instances where the OPAx322-Q1 can become unstable. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether an amplifier is stable in operation. An op amp in the unity-gain (1-V/V) buffer configuration and driving a capacitive load exhibits a greater tendency to become unstable than an amplifier operating at a higher noise gain. The capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that degrades the phase margin.
The equivalent series resistance (ESR) of some very large capacitors (CL > 1 µF) is sufficient to alter the phase characteristics in the feedback loop so the amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains, as shown in Figure 29. One technique for increasing the capacitive load drive capability of the amplifier operating in unity gain is to insert a small resistor (RS, typically 10-Ω to 20-Ω) in series with the output, as shown in Figure 30.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. A possible problem with this technique is that a voltage divider is created with the added series resistor and any resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output that reduces the output swing. However, the error contributed by the voltage divider may be insignificant. For example, with a load resistance of RL = 10 kΩ and RS = 20 Ω, the gain error is approximately 0.2%. When RL decreases to 600 Ω (which the OPAx322-Q1 is able to drive), the error increases to 7.5%.
Overload recovery time is the time required for the output of the amplifier to come out of saturation and recover to the linear region. Overload recovery is particularly important in applications where small signals must be amplified in the presence of large transients. Figure 31 and Figure 32 show the positive and negative overload recovery times of the OPAx322-Q1, respectively. In both cases, the time elapsed before the OPAx322-Q1 comes out of saturation is less than 100 ns. The symmetry between the positive and negative recovery times allows excellent signal rectification without distortion of the output signal.
spacer