SCAS544F October 1995 – May 2024 SN54ACT373 , SN74ACT373
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) | BODY SIZE(3) |
---|---|---|---|
SNx4ACT373 | DB (SSOP, 20) | 7.2mm × 7.8mm | 7.50mm x 5.30mm |
DW (SOIC, 20) | 12.8mm × 10.3mm | 12.80mm x 7.50mm | |
N (PDIP, 20) | 24.33mm × 9.4mm | 24.33mm x 6.35mm | |
NS (SOP, 20) | 12.6mm × 7.8mm | 12.6mm x 5.3mm | |
PW (TSSOP, 20) | 6.5mm × 6.4mm | 6.50mm x 4.40mm |
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NO. | SSOP, TVSOP, SOIC, SO, or TSSOP | VQFN | ||
1 | OE | OE | I | Output Enable |
2 | 1Q | 1Q | O | 1Q Output |
3 | 1D | 1D | I | 1D Input |
4 | 2D | 2D | I | 2D Input |
5 | 2Q | 2Q | O | 2Q Output |
6 | 3Q | 3Q | O | 3Q Output |
7 | 3D | 3D | I | 3D Input |
8 | 4D | 4D | I | 4D Input |
9 | 4Q | 4Q | O | 4Q Output |
10 | GND | GND | — | Ground Pin |
11 | LE | LE | I | Latch Enable |
12 | 5Q | 5Q | O | 5Q Output |
13 | 5D | 5D | I | 5D Input |
14 | 6D | 6D | I | 6D Input |
15 | 6Q | 6Q | O | 6Q Output |
16 | 7Q | 7Q | O | 7Q Output |
17 | 7D | 7D | I | 7D Input |
18 | 8D | 8D | I | 8D Input |
19 | 8Q | 8Q | O | 8Q Output |
20 | VCC | VCC | — | Power Pin |