Refer to the PDF data sheet for device specific package drawings
1.2-V – Inputs from 1.8 V, 2.5 V, 3.3 V, 5.0 V
The SN54SC4T86-SEP contains four independent 2-input XOR Gates with Schmitt-trigger inputs with extended voltage operation to allow for level translation. Each gate performs the Boolean function Y = A ⊕ B in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).
PART NUMBER | PACKAGE | PACKAGE SIZE | BODY SIZE (NOM) |
---|---|---|---|
SN54SC4T86-SEP | PW (TSSOP, 14) | 5.00 mm × 6.40 mm | 5.00 mm × 4.40 mm |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
1A | 1 | I | Channel 1, Input A |
1B | 2 | I | Channel 1, Input B |
1Y | 3 | O | Channel 1, Output Y |
2A | 4 | I | Channel 2, Input A |
2B | 5 | I | Channel 2, Input B |
2Y | 6 | O | Channel 2, Output Y |
GND | 7 | G | Ground |
3Y | 8 | O | Channel 3, Output Y |
3A | 9 | I | Channel 3, Input A |
3B | 10 | I | Channel 3, Input B |
4Y | 11 | O | Channel 4, Output Y |
4A | 12 | I | Channel 4, Input A |
4B | 13 | I | Channel 4, Input B |
VCC | 14 | P | Positive Supply |