SN65DSI84-Q1 Automotive Single-Channel MIPI® DSI to Dual-Link LVDS Bridge

1 Features

Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature
- Device HBM ESD Classification Level 3A
- Device CDM ESD Classification Level C6
Implements MIPI D-PHY Version 1.00.00 Physical Layer Front-End and Display Serial Interface (DSI) Version 1.02.00
Single-Channel DSI Receiver Configurable for One, Two, Three, or Four D-PHY Data Lanes Per Channel Operating up to 1 Gbps Per Lane
Supports 18-bpp and 24-bpp DSI Video Packets with RGB666 and RGB888 Formats
Suitable for 60-fps WUXGA 1920 × 1200 Resolution at 18-bpp and 24-bpp Color, and 60-fps 1366 × 768 Resolution at 18-bpp and 24-bpp
Output Configurable for Single-Link or Dual-Link LVDS
Supports Single-Channel DSI to Dual-Link LVDS Operating Mode
LVDS Output-Clock Range of 25 MHz to 154 MHz in Dual-Link or Single-Link Mode
LVDS Pixel Clock May be Sourced from Free-Running Continuous D-PHY Clock or External Reference Clock (REFCLK)
1.8 V Main V_CC Power Supply
Low Power Features Include SHUTDOWN Mode, Reduced LVDS Output Voltage Swing, Common Mode, and MIPI Ultra-Low Power State (ULPS) Support
LVDS Channel SWAP, LVDS PIN Order Reverse Feature for Ease of PCB Routing
Packaged in 64-pin 10 mm × 10 mm HTQFP (PAP) PowerPAD™ IC Package