SLLSE94C September   2011  – March 2015 SN65HVD62

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Block Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Driver Amplitude Adjust
      2. 10.1.2 Direction Control
      3. 10.1.3 Direction Control Time Constant
      4. 10.1.4 Conversion Between dBm and Peak-to-peak Voltage
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Supply Ranging From 3V to 5.5V
  • Independent Logic Supply of 1.6V to 5.5V
  • Wide Input Dynamic Range of –15dBm to +5dBm for Receiver
  • Power Delivered by the Driver to the Coax can be Adjusted From 0dBm to +6dBm
  • AISG Compliant Output Emission Profile
  • Low-power Standby Mode
  • Direction Control Output for RS-485 Bus Arbitration
  • Supports up to 115 kbps Signaling
  • Integrated Active Bandpass Filter with Center Frequency at 2.176MHz
  • 3mm × 3mm 16-Pin QFN Package

2 Applications

  • AISG – Interface for Antenna Line Devices
  • Tower Mounted Amplifiers (TMA)
  • General Modem Interfaces

3 Description

These transceivers modulate and demodulate signals between the logic (baseband) and a frequency suitable for long coaxial media.

The HVD62 is an integrated AISG transceiver designed to be compliant with Antenna Interface Standards Group v2.0 specification.

The HVD62 receiver integrates an active bandpass filter to enable demodulation of signals even in the presence of spurious frequency components. The filter has a 2.176 MHz center frequency.

The transmitter supports adjustable output power levels varying from +0dBm to +6dBm delivered to the 50 Ω coax cable. The HVD62 transmitter is compliant with the spectrum emission requirement provided by the AISG standard.

A direction control output is provided which facilitates bus arbitration for an RS-485 interface. These devices integrate an oscillator input for a crystal, and also accept standard clock inputs to the oscillator.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN65HVD62 VQFN (16) 3.00 mm x 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Block Diagram

SN65HVD62 app_cir_FP_llse94.gif