SN65HVD63 AISG® On and Off Keying Coax Modem Transceiver
1 Features
- 3-V to 5.5-V Supply Range
- 1.6-V to 5.5-V Independent Logic Supply
- –15-dBm to +5-dBm Wide-Input Dynamic Range
for Receiver - 0-dBm to 6-dBm Adjustable Power
Delivered by the Driver to the Coax - AISG® V2.0-Compliant Output Emission Profile
Also Conforms to Proposed AISG V3.0 Specifications - Low-Power Standby Mode
- Direction Control Output
for RS-485 Bus Arbitration - Up to 115 kbps of Signaling Support
- 2.176-MHz Center Frequency
for Integrated Active Bandpass Filter - 3-mm × 3-mm 16-Pin VQFN Package
2 Applications
- AISG – Interface for Antenna Line Devices
- Tower-Mounted Amplifiers (TMA)
- General Modem Interfaces
3 Description
The SN65HVD63 transceiver modulates and demodulates signals between a logic (baseband) interface and a frequency suitable for long coaxial media, to facilitate wired data transfer among radio equipment.
The SN65HVD63 device is an integrated AISG transceiver designed to meet the requirements of the upcoming Antenna Interface Standards Group v3.0 specification.
The SN65HVD63 receiver integrates an active bandpass filter to enable demodulation of signals even in the presence of spurious frequency components. The filter has a 2.176-MHz center frequency.
The transmitter supports adjustable output power levels from 0 dBm to 6 dBm delivered to the 50-Ω coax cable. The SN65HVD63 transmitter is compliant with the spectrum emission requirement provided by the AISG standard.
A direction control output facilitates bus arbitration for an RS-485 interface. This device integrates an oscillator input for a crystal, and also accepts standard clock inputs to the oscillator.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN65HVD63 | VQFN (16) | 3.00 mm × 3.00 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Block Diagram
4 Revision History
| DATE | REVISION | NOTES |
|---|---|---|
| July 2015 | * | Initial release. |
5 Device Comparison Table
| PART NUMBER | STANDARD SUPPORTED | SPURIOUS FREQUENCY RANGE | MAXIMUM LEVEL |
|---|---|---|---|
| SN65HVD62 | AISG 2.0 | ≤ 1.1 MHz | 2 dBm (793 mVPP) |
| ≤ 4.17 MHz | 2 dBm (793 mVPP) | ||
| SN65HVD63 | AISG 3.0 | ≤ 1.35 MHz | –13 dBm (142 mVPP) |
| ≤ 3.5 MHz | –13 dBm (142 mVPP) |
6 Pin Configuration and Functions
Pin Functions
| PIN | DESCRIPTION | ||
|---|---|---|---|
| NAME | NO. | TYPE | |
| BIAS | 10 | O | Bias voltage output for setting driver output power by external resistors |
| DIR | 5 | O | Direction control output signal for bus arbitration |
| DIRSET1 | 7 | — | DIRSET1 and DIRSET2: Bits to set the duration of DIR DIRSET[2:1]: [L:L] = 9.6 kbps; [L:H] = 38.4 kbps; [H:L] = 115 kbps; [H:H] = standby mode |
| DIRSET2 | 6 | — | |
| GND | 8 | — | Ground |
| 16 | |||
| RES | 9 | P | Input voltage to adjust driver output power that is set by external resistors from BIAS pin to GND |
| RXIN | 11 | I | Modulated input signal to the receiver |
| RXOUT | 4 | O | Digital data bit stream from receiver |
| SYNCOUT | 1 | O | Open-drain output to synchronize other devices to the 4x-carrier oscillator at XTAL1 and XTAL2 |
| TXIN | 2 | I | Digital data bit stream to driver |
| TXOUT | 12 | O | Modulated output signal from the driver |
| VCC | 13 | P | Analog supply voltage for the device |
| VL | 3 | P | Logic supply voltage for the device |
| XTAL1 | 14 | I/O | I/O pins of the crystal oscillator. Connect a 4 × fC crystal between these pins or connect XTAL1 to an 8.704-MHz clock and connect XTAL2 to GND. |
| XTAL2 | 15 | ||
| EP | — | — | Exposed pad. Connection to ground plane is recommended for best thermal conduction. |
