The SN74ACT164-Q1 device contains an 8-bit shift register with AND-gated serial
inputs and an asynchronous clear (CLR) input. The gated serial
(A and B) inputs permit complete control over incoming data; a low at either input
inhibits entry of the new data and resets the first flip-flop to the low level at
the next clock (CLK) pulse. A high-level input enables the other input, which then
determines the state of the first flip-flop. Data at the serial inputs can be
changed while CLK is high or low, provided the minimum set-up time requirements are
met. Clocking occurs on the low-to-high-level transition of CLK.
Device Information
PART
NUMBER |
PACKAGE(1) |
PACKAGE
SIZE(2) |
BODY SIZE(3) |
SN74ACT164-Q1 |
BQA (WQFN,
14) |
3mm × 2.50mm |
3mm ×
2.50mm |
PW (TSSOP
, 14) |
5mm x 6.4mm |
5mm x
4.4mm |
(2) The package size (length ×
width) is a nominal value and includes pins, where applicable.
(3) The body size (length ×
width) is a nominal value and does not include pins.