Refer to the PDF data sheet for device specific package drawings
The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
PART NUMBER | PACKAGE (PINS) | BODY SIZE (NOM) |
---|---|---|
SN54HC273J | CDIP (20) | 24.20 mm × 6.92 mm |
SN54HC273W | CFP (20) | 13.09 mm × 6.92 mm |
SN54HC273FK | LCCC (20) | 8.89 mm × 8.89 mm |
SN74HC273D | SOIC (20) | 12.80 mm × 7.50 mm |
SN74HC273DB | SSOP (20) | 7.20 mm × 5.30 mm |
SN74HC273NS | SO (20) | 12.60 mm × 5.30 mm |
SN74HC273N | PDIP (20) | 24.33 mm × 6.35 mm |
SN74HC273PW | TSSOP (20) | 6.50 mm × 4.40 mm |