SN74LV8T596 8-bit Serial-Load Shift Register with
Open-Drain Output and Logic-Level Shifter

1 Features

Latching logic with known power-up state provides consistent start-up behavior
Wide operating range of 1.65V to 5.5V
5.5V tolerant input pins
LVxT enhanced inputs combined with open-drain outputs provide maximum voltage translation flexibility:
- Over 6.67Mbps operation, (R_PU = 1kΩ,
  C_L = 30pF)
- Up translation from 1.2V to 5V with 1.8V supply
- Down translation from 5V to 0.8V or even less with any valid supply
Supports standard function pinout
Latch-up performance exceeds 250mA
per JESD 17