SCES581D JULY   2004  – October 2015 SN74LVC1GX04

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, SN74LVC1GX04
    7. 6.7  Switching Characteristics, SN74LVC1GX04
    8. 6.8  Switching Characteristics, SN74LVC1GX04
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|6
  • DRL|6
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Available in Texas Instruments NanoStar™ and NanoFree™ Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • One Unbuffered Inverter (SN74LVC1GU04) and One Buffered Inverter (SN74LVC1G04)
  • Suitable for Commonly Used Clock Frequencies:
    • 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz,
      25 MHz, 26 MHz, 27 MHz, 28 MHz
  • Maximum tpd of 2.4 ns at 3.3 V
  • Low Power Consumption, 10-μA Maximum ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • Crystal Oscillators
  • Clock Generation

3 Description

The SN74LVC1GX04 device is designed for 1.65-V to 5.5-V VCC operation. This device incorporates the SN74LVC1GU04 (inverter with unbuffered output) and the SN74LVC1G04 (inverter) functions into a single device. The LVC1GX04 is optimized for use in crystal oscillator applications.

X1 and X2 can be connected to a crystal or resonator in oscillator applications. The device provides an additional buffered inverter (Y) for signal conditioning (see Figure 5). The additional buffered inverter improves the signal quality of the crystal oscillator output by making it rail to rail.

NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff (Y output only). The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVC1GX04DBV SOT-23 (6) 2.90 mm × 1.60 mm
SN74LVC1GX04DCK SC70 (6) 2.00 mm × 1.25 mm
SN74LVC1GX04DRL SOT (6) 1.60 mm × 1.20 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Functional Block Diagram

SN74LVC1GX04 app3_ces581.gif
SN74LVC1GX04 includes both dotted portions