DATA SHEET
TLV07 36-V Precision, Rail-to-Rail Output Operational Amplifier
1 Features
- Low Offset Voltage: 100 µV (Maximum)
- Rail-to-Rail Output
- Low Noise: 19 nV / √Hz
- Unity-Gain Stable
- RFI Filtered Inputs
- Input Range Includes Negative Supply
- Rail-to-Rail Output
- Gain Bandwidth: 1 MHz
- Low Quiescent Current: 930 µA
- Full Industrial Temperature Range:
–40°C to +125°C - Offered in the Industry-Standard 8-Pin SOIC Package
2 Applications
- Battery Testers
- Tracking Amplifier in Power Modules
- Merchant Power Supplies
- Transducer Amplifiers
- Temperature Measurements
- Strain Gauge Amplifiers
3 Description
The TLV07 device is a 36-V, single-supply, low-noise, precision operational amplifier (op amp) manufactured using TI’s laser trim operational amplifier technology. Each amplifiers' input offset voltage is trimmed in production to obtain a low offset voltage of 100 µV (maximum).
The TLV07 offers outstanding dc precision and ac performance, including rail-to-rail output, low offset voltage (±100 µV, maximum) and 1-MHz bandwidth. The TLV07 is stable at G = 1 with capacitive loads up to 200 pF. The input can operate 100 mV below the negative rail and within 2 V of the positive rail. This wide input voltage range, combined with a high CMRR of 120 dB, make the TLV07 well-suited when operated in the non-inverting configuration.
The TLV07 op amp is specified from –40°C to +125°C.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TLV07 | SOIC (8) | 4.90 mm × 3.91 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
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Single Pole Low-Pass Filter With Gain
4 Revision History
Changes from * Revision (July 2017) to A Revision
- First release of production-data data sheet Go
5 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
1. NC- no internal connection
Pin Functions: TLV07
| NAME | NO. | I/O | DESCRIPTION |
|---|---|---|---|
| –IN | 2 | I | Negative (inverting) input |
| +IN | 3 | I | Positive (non-inverting) input |
| NC | 1, 5, 8 | — | No internal connection (can be left floating) |
| OUT | 6 | O | Output |
| V+ | 7 | — | Positive (highest) power supply |
| V– | 4 | — | Negative (lowest) power supply |
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range, unless otherwise noted.(1)| MIN | MAX | UNIT | |
|---|---|---|---|
| Supply voltage | –20 | 20 | V |
| Single supply voltage | 40 | V | |
| Signal input pin voltage | (V–) – 0.5 | (V+) + 0.5 | V |
| Signal input pin current | –10 | 10 | mA |
| Output short-circuit current(2) | Continuous | ||
| Operating ambient temperature, TA | –40 | 125 | °C |
| Junction temperature, TJ | 150 | °C | |
| Storage temperature, Tstg | –65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VS | Supply voltage (VS = V+ – V–) | 2.7 | 36 | V |
| TA | Operating temperature | –40 | 125 | °C |
6.4 Thermal Information: TLV07
| THERMAL METRIC | TLV07 | UNIT | |
|---|---|---|---|
| D (SOIC) | |||
| 8 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 149.5 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 97.9 | °C/W |
| RθJB | Junction-to-board thermal resistance | 87.7 | °C/W |
| ψJT | Junction-to-top characterization parameter | 35.5 | °C/W |
| ψJB | Junction-to-board characterization parameter | 89.5 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | °C/W |
6.5 Electrical Characteristics
at TA = 25°C, V+ = +15 V, V- = -15 V, VCM = VOUT = VS / 2, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted).| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| OFFSET VOLTAGE | ||||||
| VOS | Input offset voltage | 50 | ±100 | µV | ||
| dVOS/dT | Input offset voltage drift | TA = –40°C to 125°C | ±0.9 | µV/°C | ||
| PSRR | Input offset voltage vs power supply | VS = 2.7 V to 36 V | 0.3 | µV/V | ||
| INPUT BIAS CURRENT | ||||||
| IB | Input bias current | ±40 | pA | |||
| TA = –40°C to 125°C | ±3 | nA | ||||
| IOS | Input offset current | ±4 | pA | |||
| NOISE | ||||||
| Input voltage noise | ƒ = 0.1 Hz to 10 Hz | 2.7 | µVPP | |||
| en | Input voltage noise density | ƒ = 1 kHz | 19 | nV/√Hz | ||
| INPUT VOLTAGE | ||||||
| VCM | Common-mode voltage range | (V–) – 0.1 | (V+) – 2 | V | ||
| CMRR | Common-mode rejection ratio | VS = ±18 V, (V–) - 0.1 V < VCM < (V+) – 2 V | 104 | 120 | dB | |
| INPUT IMPEDANCE | ||||||
| Differential | 100 || 3 | MΩ || pF | ||||
| Common-mode | 6 || 3 | 1012 Ω || pF | ||||
| OPEN-LOOP GAIN | ||||||
| AOL | Open-loop voltage gain | (V–) + 0.35 V < VO < (V+) – 0.35 V | 110 | 130 | dB | |
| FREQUENCY RESPONSE | ||||||
| GBP | Gain bandwidth product | 1 | MHz | |||
| SR | Slew rate | G = 1 | 0.4 | V/µs | ||
| tS | Settling time | To 0.1%, VS = ±18 V, G = +1, 10-V step | 20 | µs | ||
| To 0.01% (12-bit), VS = ±18 V G = 1 10-V step |
28 | µs | ||||
| OUTPUT | ||||||
| VO | Voltage output swing from rail | RL = 10 kΩ | 120 | mV | ||
| ISC | Short-circuit current | 17 | mA | |||
| RO | Open-loop output resistance | ƒ = 1 MHz IO = 0 A |
900 | Ω | ||
| POWER SUPPLY | ||||||
| IQ | Quiescent current per amplifier | IO = 0 A | 930 | 1800 | µA | |
| TEMPERATURE | ||||||
| Specified range | –40 | 125 | °C | |||
| Operating range | –40 | 125 | °C | |||
6.6 Typical Characteristics
VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF, (unless otherwise noted)Table 1. Characteristic Performance Measurements
| DESCRIPTION | FIGURE |
|---|---|
| Offset Voltage Production Distribution | Figure 1 |
| Offset Voltage Drift Distribution | Figure 2 |
| Offset Voltage vs Temperature | Figure 3 |
| Offset Voltage vs Common-Mode Voltage | Figure 4 |
| Offset Voltage vs Power Supply | Figure 5 |
| IB and IOS vs Common-Mode Voltage | Figure 6 |
| Input Bias Current vs Temperature | Figure 7 |
| Output Voltage Swing vs Output Current (Maximum Supply) | Figure 8 |
| CMRR and PSRR vs Frequency (Referred-to-Input) | Figure 9 |
| CMRR vs Temperature | Figure 10 |
| PSRR vs Temperature | Figure 11 |
| 0.1-Hz to 10-Hz Noise | Figure 12 |
| Input Voltage Noise Spectral Density vs Frequency | Figure 13 |
| THD+N Ratio vs Frequency | Figure 14 |
| THD+N vs Output Amplitude | Figure 15 |
| Quiescent Current vs Temperature | Figure 16 |
| Quiescent Current vs Supply Voltage | Figure 17 |
| Open-Loop Gain and Phase vs Frequency | Figure 18 |
| Closed-Loop Gain vs Frequency | Figure 19 |
| Open-Loop Gain vs Temperature | Figure 20 |
| Open-Loop Output Impedance vs Frequency | Figure 21 |
| No Phase Reversal | Figure 22 |
| Positive Overload Recovery | Figure 23 |
| Negative Overload Recovery | Figure 24 |
| Small-Signal Step Response | Figure 25, Figure 26 |
| Large-Signal Step Response | Figure 27, Figure 28 |
| Large-Signal Settling Time | Figure 29 |
| Short-Circuit Current vs Temperature | Figure 30 |
| Maximum Output Voltage vs Frequency | Figure 31 |
| EMIRR IN+ vs Frequency | Figure 32 |
Figure 1. Input Offset Voltage Distribution
Figure 3. Input Offset Voltage vs Temperature
Figure 5. Offset Voltage vs Power Supply
Figure 7. Input Bias Current vs Temperature
Figure 9. CMRR and PSRR vs Frequency
Figure 11. PSRR vs Temperature
Figure 13. Input Voltage Noise Spectral Density vs Frequency
Figure 15. THD + N vs Output Amplitude
Figure 17. Quiescent Current vs Supply Voltage
Figure 19. Closed-Loop Gain vs Frequency
Figure 21. Open-Loop Output Impedance vs Frequency
Figure 23. Positive Overload Recovery
| G = +1 V/V |
| G = +1 V/V |
| 10-V positive step |
Figure 31. Maximum Output Voltage vs Frequency
Figure 2. Input Offset Voltage Drift Distribution
Figure 4. Input Offset Voltage vs Common-Mode Voltage
Figure 6. IB and IOS vs Common Mode Voltage
Figure 8. Output Voltage Swing vs Output Current (Maximum Supply)
Figure 10. CMRR vs Temperature
Figure 12. 0.1-Hz to 10-Hz Noise
Figure 14. THD + N Ratio vs Frequency
Figure 16. Quiescent Current vs Temperature
Figure 18. Open-Loop Gain and Phase vs Frequency
Figure 20. Open-Loop Gain vs Temperature
Figure 22. No Phase Reversal
Figure 24. Negative Overload Recovery
| G = –1 V/V |
| G = –1 V/V |
Figure 32. EMIRR IN+ vs Frequency
