TLV4062-Q1, TLV4082-Q1 Dual, Low-Power Comparator with Integrated Reference

1 Features

Qualified for automotive applications
AEC-Q100 qualified with the following results:
- Device temperature grade 1: –40°C to 125°C ambient operating temperature range
- Device HBM ESD classification level H1C
- Device CDM ESD classification level C4B
Wide supply voltage range: 1.5 V to 5.5 V
Two-channel detectors in small packages
High threshold accuracy: 1% over temperature
Precision hysteresis: 60 mV
Low quiescent current: 2 µA (typ)
Temperature range: –40°C to +125°C
Push-pull (TLV4062-Q1) and open-drain (TLV4082-Q1) output options
Available in an SOT-23 package

2 Applications

3 Description

The TLV4062-Q1 and TLV4082-Q1 are a family of high-accuracy, dual-channel comparators featuring low power and small solution size. The IN1 and IN2 inputs include hysteresis to reject brief glitches, thus ensuring stable output operation without false triggering.

The TLV4062-Q1 and TLV4082-Q1 have adjustable INx inputs that can be configured by an external resistor divider pair. When the voltage at the IN1 or IN2 input goes below the falling threshold, OUT1 or OUT2 is driven low, respectively. When IN1 or IN2 rises above the rising threshold, OUT1 or OUT2 goes high, respectively.

The comparators have a very low quiescent current of 2 µA (typical) and provide a precise, space-conscious solution for low-power, voltage monitoring. The TLV4062-Q1 and TLV4082-Q1 operate from 1.5 V to 5.5 V, over the –40°C to +125°C temperature range.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TLV4062-Q1, TLV4082-Q1	SOT-23 (6)	2.90 mm × 1.60 mm

(1) For all available packages, see the orderable addendum at the end of the datasheet.

Block Diagram for TLV4062-Q1

Block Diagram for TLV4082-Q1

4 Revision History

DATE	REVISION	NOTES
October 2020	*	Initial release.

5 Pin Configuration and Functions

Figure 5-1 DBV Package, 6-Pin SOT-23

Table 5-1 Pin Functions

NAME	NO.	I/O	DESCRIPTION
NAME	DBV	I/O	DESCRIPTION
GND	5	—	Ground
OUT1	2	O	OUT1 is the output for IN1. OUT1 is asserted (driven low) when the voltage at IN1 falls below V_IT–. OUT1 is deasserted (goes high) after IN1 rises higher than V_IT+. OUT1 is a push-pull output for the TLV4062 and an open-drain output for the TLV4082. The open-drain device (TLV4082) can be pulled up to 5.5 V independent of V+; a pullup resistor is required for this device.
OUT2	3	O	OUT2 is the output for IN2. OUT2 is asserted (driven low) when the voltage at IN2 falls below V_IT–. OUT2 is deasserted (goes high) after IN2 rises higher than V_IT+. OUT2 is a push-pull output for the TLV4062 and an open-drain output for the TLV4082. The open-drain device (TLV4082) can be pulled up to 5.5 V independent of V+; a pullup resistor is required for this device.
IN1	6	I	This pin is connected to the voltage to be monitored with the use of an external resistor divider. When the voltage at this pin drops below the threshold voltage (V_IT–), OUT1 is asserted.
IN2	4	I	This pin is connected to the voltage to be monitored with the use of an external resistor divider. When the voltage at this pin drops below the threshold voltage (V_IT–), OUT2 is asserted.
V+	1	I	Supply voltage input. Connect a 1.5-V to 5.5-V supply to V+ in order to power the device. Good analog design practice is to place a 0.1-µF ceramic capacitor close to this pin (required for V+ < 1.5 V).