The TLVx333 series of CMOS operational amplifiers offer precision performance at a very competitive price. These devices are members of the zero-drift family of amplifiers that uses a proprietary auto-calibration technique to simultaneously provide low offset voltage (15 μV, max) and near-zero drift over time and temperature at only 28 μA (max) of quiescent current. The TLVx333 family features rail-to-rail input and output in addition to near-flat 1/f noise, making this amplifier ideal for many applications and much easier to design into a system. These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V).
The TLV333 (single version) is available in the SC70-5, SOT23-5, and SOIC-8 packages. The TLV2333 (dual version) is offered in VSSOP-8 and SOIC-8 packages. The TLV4333 is offered in the standard SOIC-14 and TSSOP-14 packages. All versions are specified for operation from –40°C to +125°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TLV333 | SOIC (8) | 4.90 mm × 3.91 mm |
SOT-23 (5) | 2.90 mm × 1.60 mm | |
SC70 (5) | 2.00 mm × 1.25 mm | |
TLV2333 | SOIC (8) | 4.90 mm × 3.91 mm |
VSSOP (8) | 3.00 mm × 3.00 mm | |
TLV4333 | SOIC (14) | 8.65 mm × 3.91 |
TSSOP (14) | 5.00 mm × 4.40 mm |
DATE | REVISION | NOTES |
---|---|---|
December 2015 | * | Initial release. |
DEVICE | NO. OF CHANNELS |
PACKAGE-LEADS | ||||
---|---|---|---|---|---|---|
SOIC | SOT23 | SC70 | VSSOP | TSSOP | ||
TLV333 | 1 | 8 | 5 | 5 | — | — |
TLV2333 | 2 | 8 | — | — | 8 | — |
TLV4333 | 4 | 14 | — | — | — | 14 |
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | NO. | ||||
DBV (SOT23) |
DCK (SC70) |
D (SOIC) |
|||
–IN | 4 | 3 | 2 | I | Inverting input |
+IN | 3 | 1 | 3 | I | Noninverting input |
NC | — | — | 1, 5, 8 | — | No internal connection (can be left floating) |
OUT | 1 | 4 | 6 | O | Output |
V– | 2 | 2 | 4 | — | Negative (lowest) power supply |
V+ | 5 | 5 | 7 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
D (SOIC, VSSOP) |
|||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
V– | 4 | — | Negative (lowest) power supply |
V+ | 8 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
D (SOIC) | PW (TSSOP) | |||
–IN A | 2 | 2 | I | Inverting input, channel A |
+IN A | 3 | 3 | I | Noninverting input, channel A |
–IN B | 6 | 6 | I | Inverting input, channel B |
+IN B | 5 | 5 | I | Noninverting input, channel B |
–IN C | 9 | 9 | I | Inverting input, channel C |
+IN C | 10 | 10 | I | Noninverting input, channel C |
–IN D | 13 | 13 | I | Inverting input, channel D |
+IN D | 12 | 12 | I | Noninverting input, channel D |
OUT A | 1 | 1 | O | Output, channel A |
OUT B | 7 | 7 | O | Output, channel B |
OUT C | 8 | 8 | O | Output, channel C |
OUT D | 14 | 14 | O | Output, channel D |
V– | 11 | 11 | — | Negative (lowest) power supply |
V+ | 4 | 4 | — | Positive (highest) power supply |