SBVS151F December   2010  – April 2017 TLV705 , TLV705P

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Undervoltage Lockout (UVLO)
      3. 7.3.3 Start-Up Current
      4. 7.3.4 Dropout Voltage
      5. 7.3.5 Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
    4. 10.4 Power Dissipation and Junction Temperature
    5. 10.5 Estimating Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Mounting

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Very Low Dropout:
    • 105 mV at IOUT = 150 mA
    • 145 mV at IOUT = 200 mA
  • Accuracy: 0.5% Typical
  • Low IQ: 35 μA
  • Available in Fixed-Output Voltages From
    0.7 V to 4.8 V
  • VIN Range: 2 V to 5.5 V
  • High PSRR: 70 dB at 1 kHz
  • Stable With Effective Capacitance of 0.1 μF
  • Thermal Shutdown and Overcurrent Protection
  • Available in an Ultra-Low Profile (0.15-mm Maximum Height) PicoStar Package Option

Applications

  • Wireless Handsets
  • Smart Phones
  • Zigbee® Networks
  • Bluetooth® Devices
  • Other Li-Ion Operated Handheld Products
  • WLAN and Other PC Add-On Cards

Description

The TLV705 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These devices are designed for power-sensitive applications, with a precision band gap. An error amplifier provides typical accuracy of 0.5%. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of LDOs ideal for a wide selection of battery-operated handheld equipment. All devices have a thermal shutdown and current limit for safety.

Furthermore, the TLV705 series is stable with an effective output capacitance of only 0.1 μF. This feature enables the use of cost-effective capacitors that have higher bias voltage and temperature derating. The devices regulate to the specified accuracy with zero output load. The TLV705P series also provides an active pulldown circuit to quickly discharge output.

The TLV705 and TLV705P series are both available in 0.77-mm × 0.77-mm DSBGA and PicoStar packages with three height options that are optimal for handheld applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TLV705 DSGBA (4) 0.77 mm × 0.77 mm
PicoStar (4) 0.77 mm × 0.77 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit (Fixed-Voltage Versions)

TLV705 TLV705P pg1_cir_bvs151.gif