The TLV705 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These devices are designed for power-sensitive applications, with a precision band gap. An error amplifier provides typical accuracy of 0.5%. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of LDOs ideal for a wide selection of battery-operated handheld equipment. All devices have a thermal shutdown and current limit for safety.
Furthermore, the TLV705 series is stable with an effective output capacitance of only 0.1 μF. This feature enables the use of cost-effective capacitors that have higher bias voltage and temperature derating. The devices regulate to the specified accuracy with zero output load. The TLV705P series also provides an active pulldown circuit to quickly discharge output.
The TLV705 and TLV705P series are both available in 0.77-mm × 0.77-mm DSBGA and PicoStar packages with three height options that are optimal for handheld applications.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TLV705 | DSGBA (4) | 0.77 mm × 0.77 mm |
PicoStar (4) | 0.77 mm × 0.77 mm |
Changes from E Revision (May 2015) to F Revision
Changes from D Revision (April 2015) to E Revision
Changes from C Revision (October 2012) to D Revision
Changes from B Revision (December 2011) to C Revision
Changes from A Revision (August 2011) to B Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
GND | A1 | — | Ground pin. |
EN | A2 | I | Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V places the regulator into shutdown mode, which reduces the operating current to 1 μA (nominal). |
VOUT | B1 | O | Regulated output voltage pin. Placing a small 1-μF ceramic capacitor is required from this pin to ground to ensure stability. See Input and Output Capacitor Requirements for more details. |
VIN | B2 | I | Input pin. TI recommends placing a small 1-µF capacitor from this pin to ground for good transient performance. See Input and Output Capacitor Requirements for more details. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage(2) | VIN | –0.3 | 6 | V |
VEN | –0.3 | 6 | V | |
VOUT | –0.3 | 6 | V | |
Maximum output current | IOUT | Internally limited | ||
Output short-circuit duration | Indefinite | |||
Temperature | Operating junction, TJ | –55 | 150 | °C |
Storage, Tstg | –55 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | Input voltage | 2 | 5.5 | V | |
VOUT | Output voltage | 0.7 | 4.8 | V | |
IOUT | Output current | 0 | 200 | mA | |
TJ | Junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TLV705 | UNIT | ||
---|---|---|---|---|
YFF, YFP (DSBGA) |
YFM (PicoStar) |
|||
4 PINS | 4 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 160 | 191.7 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 80 | 3.1 | °C/W |
RθJB | Junction-to-board thermal resistance | 90 | 36.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.5 | 2.8 | °C/W |
ψJB | Junction-to-board characterization parameter | 78 | 26.5 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VIN | Input voltage range | 2 | 5.5 | V | |||
VOUT | Output voltage range | 0.7 | 4.8 | V | |||
VO | DC output accuracy | –40°C ≤ TJ ≤ 125°C | 0 mA ≤ IOUT ≤ 200 mA, VOUT ≥ 1 V | –2% | ±0.5% | 2% | |
0 mA ≤ IOUT ≤ 200 mA, VOUT < 1 V | –20 | ±5 | 20 | mV | |||
ΔVOUT(ΔVIN) | Line regulation | VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V | 0.05 | 5 | mV | ||
ΔVOUT(ΔIOUT) | Load regulation | 0 mA ≤ IOUT ≤ 200 mA | 1 | mV | |||
VDO | Dropout voltage(1) | VIN = 0.98 × VOUT(nom), IOUT = 200 mA | 145 | 250 | mV | ||
ICL | Output current limit | VOUT = 0.9 × VOUT(nom), TJ = 25°C | 260 | 400 | 550 | mA | |
IGND | Ground pin current | IOUT = 0 mA | 35 | 55 | μA | ||
IOUT = 200 mA | 315 | μA | |||||
ISHUTDOWN | Shutdown ground pin current | VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V | 1 | 1.8 | μA | ||
PSRR | Power-supply rejection ratio | VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, f = 10 kHz |
80 | dB | |||
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, f = 1 MHz |
55 | dB | |||||
Vn | Output noise voltage | BW = 100 Hz to 100 kHz, IOUT = 10 mA |
VIN = 2.3 V, VOUT = 1.8 V | 26.6 | μVRMS | ||
VIN = 3.3 V, VOUT = 2.8 V | 26.7 | μVRMS | |||||
VIN = 3.8 V, VOUT = 3.3 V | 28.2 | μVRMS | |||||
BW = 10 Hz to 100 kHz, IOUT = 10 mA | VIN = 2.3 V, VOUT = 1.8 V | 30.7 | μVRMS | ||||
VIN = 3.3 V, VOUT = 2.8 V | 31.3 | μVRMS | |||||
VIN = 3.8 V, VOUT = 3.3 V | 34.1 | μVRMS | |||||
tSTR | Start-up time(2) | COUT = 1 μF, IOUT = 200 mA | 100 | μs | |||
VHI | Enable high (enabled) | 0.9 | VIN | V | |||
VLO | Enable low (disabled) | 0 | 0.4 | V | |||
IEN | EN pin current | VEN = 5.5 V | 0.01 | μA | |||
UVLO | Undervoltage lockout | VIN rising | 1.9 | V | |||
tSD | Thermal shutdown temperature | Shutdown, temperature increasing | 160 | °C | |||
Reset, temperature decreasing | 140 | °C | |||||
TJ | Operating junction temperature | –40 | 125 | °C |