SLASEE9B September   2017  – December 2017 TPA3221

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Audio Characteristics (BTL)
    7. 7.7 Audio Characteristics (PBTL)
    8. 7.8 Typical Characteristics, BTL Configuration, AD-mode
    9. 7.9 Typical Characteristics, PBTL Configuration, AD-mode
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Internal LDO
        1. 9.3.1.1 Input Configuration, Gain Setting And Master / Slave Operation
      2. 9.3.2 Gain Setting And Master / Slave Operation
      3. 9.3.3 AD-Mode and HEAD-Mode PWM Modulation
      4. 9.3.4 Oscillator
      5. 9.3.5 Input Impedance
      6. 9.3.6 Error Reporting
    4. 9.4 Device Functional Modes
      1. 9.4.1 Powering Up
        1. 9.4.1.1 Startup Ramp Time
      2. 9.4.2 Powering Down
        1. 9.4.2.1 Power Down Ramp Time
      3. 9.4.3 Device Reset
      4. 9.4.4 Device Soft Mute
      5. 9.4.5 Device Protection System
        1. 9.4.5.1 Overload and Short Circuit Current Protection
        2. 9.4.5.2 Signal Clipping and Pulse Injector
        3. 9.4.5.3 DC Speaker Protection
        4. 9.4.5.4 Pin-to-Pin Short Circuit Protection (PPSC)
        5. 9.4.5.5 Overtemperature Protection OTW and OTE
        6. 9.4.5.6 Undervoltage Protection (UVP), Overvoltage Protection (OVP) and Power-on Reset (POR)
        7. 9.4.5.7 Fault Handling
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Stereo BTL Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedures
          1. 10.2.1.2.1 Decoupling Capacitor Recommendations
          2. 10.2.1.2.2 PVDD Capacitor Recommendation
          3. 10.2.1.2.3 BST capacitors
          4. 10.2.1.2.4 PCB Material Recommendation
      2. 10.2.2 Typical Application, Differential (2N), AD-Mode PBTL (Outputs Paralleled before LC filter)
        1. 10.2.2.1 Design Requirements
      3. 10.2.3 Typical Application, Differential (2N), AD-Mode PBTL (Outputs Paralleled after LC filter)
        1. 10.2.3.1 Design Requirements
  11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
      1. 11.1.1 VDD Supply
      2. 11.1.2 AVDD and GVDD Supplies
      3. 11.1.3 PVDD Supply
      4. 11.1.4 BST Supply
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
      1. 12.2.1 BTL Application Printed Circuit Board Layout Example
      2. 12.2.2 PBTL (Outputs Paralleled before LC filter) Application Printed Circuit Board Layout Example
      3. 12.2.3 PBTL (Outputs Paralleled after LC filter) Application Printed Circuit Board Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Wide 7-V to 30-V Supply Voltage Operation
  • Stereo (2 x BTL) and Mono (1 x PBTL) Operation
  • Output Power at 10% THD+N
    • 105-W Stereo into 4 Ω in BTL Configuration
    • 112-W Stereo into 3 Ω in BTL Configuration
    • 208-W Mono into 2 Ω in PBTL Configuration
  • Output Power at 1% THD+N
    • 88-W Stereo into 4 Ω in BTL Configuration
    • 100-W Stereo into 3 Ω in BTL Configuration
    • 170-W Mono into 2 Ω in PBTL Configuration
  • 5-V Gate Drive or Built-in LDO for Optional Single-Supply Operation
  • Closed-Loop Feedback Design
    • Signal Bandwidth up to 100 kHz for High-Frequency Content From HD Sources
    • 0.02% THD+N at 1 W into 4 Ω
    • 60-dB PSRR (BTL, No Input Signal)
    • <75-µV Output Noise (A-Weighted)
    • >108-dB SNR (A-Weighted)
    • AD or HEAD Modulation Schemes
  • Low-Power Operating Modes
    • Standby Modes: Mute and < 1 mA Shutdown
    • Low Idle-Current HEAD Modulation Scheme
    • Single-Channel BTL Operation
  • Multiple Input Options to Simplify Pre-Amp Design
    • Differential or Single-Ended Analog Inputs
    • Selectable Gains: 18 dB, 24 dB, 30 dB, 34 dB
  • Integrated Protection: Undervoltage, Overvoltage, Cycle-by-cycle Current Limit, Short Circuit, Clipping Detection, Overtemperature Warning and Shutdown, and DC Speaker Protection
  • 90% Efficient Class-D Operation (4 Ω)
  • Pin-Compatible Family of Devices with Voltage and Power-Level Options

2 Applications

  • Wireless and Powered Speakers
  • Soundbars
  • Subwoofers
  • Bookshelf Stereo Systems
  • Professional and Public Address (PA) Speakers

3 Description

TPA3221 is a high-power Class-D amplifier that enables efficient operation at full-power, idle and standby. The device features closed-loop feedback with a bandwidth up to 100 kHz, which provides low distortion across the audio band and delivers excellent sound quality. The device operates with either AD or low idle-current HEAD (High Efficient AD mode) modulation, and can drive up to 2 x 105 W into 4-Ω load or 1 x 208 W into 2-Ω load.

The TPA3221 features a single-ended or differential analog-input interface that supports up to 2 VRMS with four selectable gains: 18 dB, 24 dB, 30 dB and 34 dB. The TPA3221 also achieves >90% efficiency, low idle power (<0.25 W) and ultra-low standby power (<0.1 W). This is made possible through the use of 70-mΩ MOSFETs, an optimized gate drive scheme and low-power operating modes. TPA3221 includes a built-in LDO for easy integration in single-power-supply systems. To further simplify the design, the device integrates essential protection features including undervoltage, overvoltage, cycle-by-cycle current limit, short circuit, clipping detection, overtemperature warning and shutdown, as well as DC speaker protection.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPA3221 HTSSOP (44) 6.10 mm x 14.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

TPA3221 FrontPageDiagram.gif

4 Revision History

Changes from A Revision (November 2017) to B Revision

  • Changed OUT_P To: OUT1_P for 1 x BTL in Table 1 Go
  • Added pins OSCM, OSCP to the Interface pins in the Absolute Maximun Ratings tableGo
  • Changed the TJ MIN value From: 0°C To –40°C in the Absolute Maximun Ratings tableGo
  • Deleted TJ Junction Temperature from the Recommended Operating Conditions tableGo
  • Changed the capacitor on IN1_P, IN2_P and IN1_M, IN2_M From: 10µF To: 1µF in Figure 50Go
  • Changed the capacitor on IN1_P and IN1_M From: 10µF To: 1µF in Figure 51Go
  • Changed the capacitor on IN1_P and IN1_M From: 10µF To: 1µF in Figure 52Go

Changes from * Revision (September 2017) to A Revision

  • Changed From: Advanced Information To: Production DataGo