DATA SHEET
TPDxF003 Four-, Six-, and Eight-Channel EMI Filters With Integrated ESD Protection
1 Features
- Four-, Six-, and Eight-Channel EMI Filtering for Data Ports
- –3 dB Bandwidth of 200 MHz
- Greater than 25 dB attenuation at 1 GHz
- IEC 61000-4-2 Level 4 ESD Protection
- ±12-kV Contact Discharge
- ±20-kV Air Gap Discharge
- Pi-Style (C-R-C) Filter Configuration
(R = 100 Ω, CTOTAL = 17 pF) - Low 10-nA Leakage Current
- Easy Flow-Through Routing
2 Applications
- Display Interfaces
- Cell Phones
- Tablets
- SVGA Video Connections
- Memory Interfaces
3 Description
The TPDxF003 family is a series of highly integrated devices designed to provide Electromagnetic Interference (EMI) filtering in all systems subjected to electromagnetic interference. These filters also provide a Transient Voltage Suppressor (TVS) diode circuit for Electrostatic Discharge (ESD) protection which prevents damage to the application when subjected to ESD stress far exceeding IEC 61000-4-2 (Level 4).
The TPDxF003 family is specified for –40°C to 85°C operation. These filters are also packaged in space-saving 0.4-mm pitch DQD packages.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TPD4F003 | WSON (8) | 1.70 mm x 1.35 mm |
| TPD6F003 | WSON (12) | 2.50 mm x 1.35 mm |
| TPD8F003 | WSON (16) | 3.30 mm x 1.35 mm |
- For all available packages, see the orderable addendum at the end of the datasheet.
Equivalent Schematic
4 Revision History
Changes from D Revision (January 2010) to E Revision
- Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
5 Pin Configuration and Functions
DQD PACKAGE
(TOP VIEW)
Pin Functions - TPD4F003
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | No. | ||
| ChX_In | 1, 2, 3, 4 | IO | ESD-protected channel, connected to corresponding ChX_Out |
| ChX_Out | 5, 6, 7, 8 | IO | ESD-protected channel, connected to corresponding ChX_In |
| GND | GND | G | Ground |
Pin Functions - TPD6F003
| PIN | I/O | Description | |
|---|---|---|---|
| Name | No. | ||
| ChX_In | 1, 2, 3, 4, 5, 6 | IO | ESD-protected channel, connected to corresponding ChX_Out |
| ChX_Out | 7, 8, 9, 10, 11, 12 | IO | ESD-protected channel, connected to corresponding ChX_In |
| GND | GND | G | Ground |
Pin Functions - TPD8F003
| PIN | I/O | Description | |
|---|---|---|---|
| Name | No. | ||
| ChX_In | 1, 2, 3, 4, 5, 6, 7, 8 | IO | ESD-protected channel, connected to corresponding ChX_Out |
| ChX_Out | 9, 10, 11, 12, 13, 14, 15, 16 | IO | ESD-protected channel, connected to corresponding ChX_In |
| GND | GND | G | Ground |
6 Specifications
6.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VIO | IO to GND | 6 | V | ||
| TJ | Junction temperature | 150 | °C | ||
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
6.2 Handling Ratings
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| Tstg | Storage temperature range | –65 | 150 | °C | |
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±15 | kV | |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1500 | V | |||
| IEC 61000-4-2 ESD Rating - Contact | ±12 | kV | |||
| IEC 61000-4-2 ESD Rating - Air | ±20 | ||||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VIO | 0 | 5.5 | V | |
| TA | –40 | 85 | °C | |
6.4 Thermal Information
| THERMAL METRIC(1) | TPD4F003 | TPD6F003 | TPD8F003 | UNIT | |
|---|---|---|---|---|---|
| DQD | |||||
| 8 PINS | 12 PINS | 16 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 115.6 | 89.2 | 80.8 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 108.5 | 100.1 | 88.3 | |
| RθJB | Junction-to-board thermal resistance | 66.4 | 50.5 | 45.8 | |
| ψJT | Junction-to-top characterization parameter | 6.8 | 9.4 | 9.2 | |
| ψJB | Junction-to-board characterization parameter | 65.9 | 50.0 | 45.4 | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 33.2 | 31.0 | 31.8 | |
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
TA = –40°C to 85°C (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VBR | DC breakdown voltage | IIO = 10 μA | 6 | V | ||
| R | Resistance | 85 | 100 | 115 | Ω | |
| C | Capacitance (C1 or C2) | VIO = 2.5 V | 8.5 | pF | ||
| IIO | Channel leakage current | VIO = 3.3 V | 10 | nA | ||
| fC | Cut-off frequency | ZSOURCE = 50 Ω, ZLOAD = 50 Ω | 200 | MHz | ||
(1) Typical values are at TA = 25°C.
6.6 Typical Characteristics
6.6.1 IEC Clamping Waveforms
(clamp voltage measured both at Ch_Out and Ch_In)
Figure 1. With 8 kV Contact ESD Stress at Ch_Out
Figure 3. With -8 kV Contact ESD Stress at Ch_Out
Figure 2. With 12 kV Contact ESD Stress at Ch_Out
Figure 4. With -12 kV Contact ESD Stress at Ch_Out
Figure 6. DC Voltage-Current Sweep Across Input/Output Pins
6.6.2 Channel-to-Channel Crosstalk
Figure 7. TPD4F003
Figure 9. TPD8F003
Figure 8. TPD6F003
