Optical Disc Drive (Blu-ray, DVD, CD)
The TPIC2050 is low-noise-type motor driver IC suitable for 12-V ODD. The 9-channel driver, IC controlled by serial interface, is optimum for driving a spindle motor, sled motor (stepping motor applicable), load motor, focus / tracking / tilt actuators, and stepping motor for the collimator lens.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPIC2050 | HTSSOP (56) | 6.10 mm × 14.00 mm |
DATE | REVISION | NOTES |
---|---|---|
August 2015 | * | Initial release. |
The spindle motor driver part builds in the sensor-less logic that attains low-noise operation at start-up and while running. Motors or sensors, such as a Hall device, are not required by the starting circuit for self-starting, or for performing position detection by BEMF. As the output stage of all channels works in efficient PWM driving, low-power operation by PWM control is possible. Neutral zone-less control is possible for a focus / tracking / tilt actuator driver. In addition, the spindle part output current limiting circuit, thermal shutdown circuit, sled-end detection circuit, collimator lens end detection circuit, actuator protection, and three beam laser drivers are built in. The newly added built-in thermometer can measure IC temperature.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
SLED1_P | 1 | OUT | Sled1 positive output terminal |
SLED1_N | 2 | OUT | Sled1 negative output terminal |
P12V_3 | 3 | PS | Power supply terminal for 12-V drivers output |
SLED2_P | 4 | OUT | Sled2 positive output terminal |
SLED2_N | 5 | OUT | Sled2 negative output terminal |
PGND_2 | 6 | PS | GND terminal for 12-V drivers |
C10V | 7 | MISC | Capacitance connection terminal for internal regulator |
CP1 | 8 | MISC | Capacitance connection for charge pump |
CP2 | 9 | MISC | Capacitance connection for charge pump |
CP3 | 10 | MISC | Capacitance connection for charge pump |
GPOUT | 11 | OUT | General-purpose output (test monitor) |
XFG | 12 | OUT | Motor speed signal output |
RDY | 13 | OUT | Device ready signal. Internally pulled up to SIOV |
SSZ | 14 | IN | SIO slave select low active input terminal |
SCLK | 15 | IN | SIO serial clock input terminal |
SIMO | 16 | IN | SIO slave input master output terminal |
SOMI | 17 | OUT | SIO slave output master input terminal |
SIOV | 18 | PS | Power-supply terminal for serial port. 3.3-V typical |
XRSTIN | 19 | IN | RESET input terminal to disable the driver IC |
TEST1 | 20 | MISC | Test pin. Should be open |
VLDDIN | 21 | IN | Laser diode control analog signal input 0 to 3-V terminal. Required to set register when using VLDDIN input. Open in case of non-use analog input. |
CV3P3 | 22 | MISC | Capacitance terminal for internal 3.3-V core (typical 0.1 µF) |
AGND/DGND | 23 | PS | Ground terminal for internal digital and analog |
A9P5V | 24 | PS | Power-supply terminal 9.5-V laser diode for BD |
ILDD_BD | 25 | OUT | Laser diode for BD output terminal |
ILDD_DVD | 26 | OUT | Laser diode for DVD output terminal |
ILDD_CD | 27 | OUT | Laser diode for CD output terminal |
CP5V | 28 | MISC | Capacitance connection terminal for control system power supply. Connect a ≥0.1-µF decoupling capacitor. |
LOAD_P | 29 | OUT | Load positive output terminal |
LOAD_N | 30 | OUT | Load negative output terminal |
P5V12L | 31 | PS | Power-supply terminal (5 or 12 V) for load driver output stages. |
TEST2 | 32 | MISC | Test pin. Should be open |
TEST3 | 33 | MISC | Test pin. Should be connected to P5V. |
P5V_1 | 34 | PS | Power-supply terminal for tilt/focus/tracking drivers |
TLT_N | 35 | OUT | Tilt negative output terminal |
TLT_P | 36 | OUT | Tilt positive output terminal |
TRK_P | 37 | OUT | Tracking positive output terminal |
TRK_N | 38 | OUT | Tracking negative output terminal |
FCS_P | 39 | OUT | Focus positive output terminal |
FCS_N | 40 | OUT | Focus negative output terminal |
PGND_1 | 41 | PS | GND terminal for tilt/focus/tracking channel drivers |
P12V_1 | 42 | PS | Power-supply terminal for 12-V driver output stage |
U | 43 | OUT | U-phase output terminal for spindle motor |
ICOM1 | 44 | MISC | Current sense resistor terminal for spindle driver |
V | 45 | OUT | V-phase output terminal for spindle motor |
P12V_2 | 46 | PS | Power-supply terminal for 12-V driver output stage |
W | 47 | OUT | W-phase output terminal for spindle motor |
ICOM2 | 48 | MISC | Current sense resistor terminal for spindle driver |
MCOM | 49 | IN | Motor center tap connection |
ISENSE | 50 | IN | Current sense input terminal for spindle drivers |
AGND | 51 | PS | Ground terminal for internal analog |
STP1_P | 52 | OUT | STP1 positive output terminal for collimator |
STP1_N | 53 | OUT | STP1 negative output terminal for collimator |
STP2_P | 54 | OUT | STP2 positive output terminal for collimator |
STP2_N | 55 | OUT | STP2 negative output terminal for collimator |
P5V_2 | 56 | PS | Power supply terminal for 5-V driver output |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
5-V supply voltage P5V | 6 | V | |||
12-V supply voltage P12V | 15 | ||||
9.5-V supply voltage A9P5V | 15 | ||||
Load supply P5V12 voltage | 15 | ||||
Spindle output peak voltage | 15 | ||||
Spindle output current | 2.5 | A | |||
Spindle output peak current, (PW ≤ 2 ms, Duty ≤ 30%) | 3.5 | ||||
Sled output peak current | 1.0 | ||||
Focus/tracking/tilt driver output peak current | 1.0 | ||||
Load driver output peak current | 1.0 | ||||
Laser diode driver output peak current | 247(3) | mA | |||
Input/output voltage | –0.3 | VCC + 0.3 | V | ||
Power dissipation(2) | 1344 | mW | |||
Operating temperature | –20 | 75 | °C | ||
Lead temperature 1.6 mm from case for 10 s | 260 | ||||
Tstg | Storage temperature | –60 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
P5V | Operating supply voltage (apply for P5V) | 4.5 | 5.0 | 5.5 | V |
P12V | Driver 12-V supply voltage (apply for P12V(1)) | 10.8 | 12.0 | 13.2 | |
A9P5V | Power supply laser diode for BD (apply for A9P5V) | 7.65 | 9.5 | 10.45 | |
P5V12L | Load operating supply voltage (apply for P5V12L) | 4.5 | 5.0 | 5.5 | |
10.8 | 12.0 | 13.2 | |||
VSIOV | SIOV voltage | 3.0 | 3.3 | 36 | |
Tope | Operating temperature range | –20 | 25 | 75 | °C |
Fck | SCLK frequency | 30 | 33.8688 | 35 | MHz |
VSIFH | SIMO, SSZ, SCLK pin 'H' level input voltage range | 2.2 | SIOV + 0.2 | V | |
VSIFL | SIMO, SSZ, SCLK pin 'L' level input voltage range | –0.2 | 0.8 | ||
VIHB | XRSTIN pin 'H' level input voltage | 2.2 | P5V + 0.1 | ||
VILB | XRSTIN pin 'L' level input voltage range | –0.1 | 0.8 | ||
ISPMOA | Spindle output average current U,V,W Total) | 0.5 | 1.7 | A | |
ISPMO | Spindle output current | 1.7 | |||
ISLDOA | Sled output average current | 0.25 | 0.8 | ||
IACTOA | Focus/ tracking/ tilt/ loading output average current | 0.5 | 0.8 | ||
ISTPOA | STP output average current | 300 | mA |
THERMAL METRIC(1) | TPIC2050 | UNIT | |
---|---|---|---|
DFD (HTSSOP) | |||
56 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 16.7 | °C/W |
RθJC | Junction-to-case thermal resistance | 0.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 5.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 5.1 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 0.9 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
COMMON PART | ||||||
ISTBY | Standby supply current | Standby mode | 0.6 | 1.2 | mA | |
VCV3 | CV3P3 output voltage | Iload = 25 mA | 3.1 | 3.3 | 3.4 | V |
RXM | XRSTIN pulldown resistor | 100 | 200 | 300 | kΩ | |
RRDY | RDY pullup resistor | 1.5 | 33 | 49.5 | ||
VRDY | RDY low level output voltage | SIOV = 3.3 V, IOL = –100 µA | 0.3 | V | ||
RXFG | XFG output resistor | 100 | 200 | 300 | Ω | |
VXFGH | XFG high-level output voltage | SIOV = 3.3 V, XSLEEP = 1, IOH = 100 µA | SIOV – 0.3 | V | ||
VXFGL | XFG low-level output voltage | SIOV = 3.3 V, XSLEEP = 1, IOL = 100 µA | 0.3 | |||
RGPO | GPOUT output resistor | 100 | 200 | 300 | Ω | |
VGPOH | GPOUT high-level output voltage | SIOV = 3.3 V, XSLEEP = 1, GPOUT_ENA = 1, GPOUT_HL = 1, IOH = 100 µA | SIOV – 0.3 | V | ||
VGPOL | GPOUT low-level output voltage | SIOV = 3.3 V, XSLEEP = 1, GPOUT_ENA = 1, GPOUT_HL = 0, IOH = 100 µA | 0.3 | |||
TTSD | Thermal protection on temperature | Design value | 135 | 150 | 165 | °C |
TSDhys | Thermal protection hysteresis temperature | 5 | 15 | 25 | ||
Vonvcc | P5V reset on voltage | 3.6 | 3.7 | 3.8 | V | |
Voffvcc | P5V reset off voltage | 3.8 | 3.9 | 4.0 | V | |
Vonvcc | P12V reset on voltage | 7.9 | 8.4 | 8.9 | V | |
Voffcc | P12V reset off voltage | 8.3 | 8.8 | 9.3 | V | |
VonCV3 | CV3P3 reset on voltage | 2.6 | 2.7 | 2.8 | V | |
VoffCV3 | CV3P3 reset off voltage | 2.7 | 2.8 | 2.9 | V | |
VovpPspmOn | OVP predetection voltage (spindle) | 13.4 | 14.1 | 14.8(1) | V | |
VovpPspmOff | OVP prerelease voltage (spindle) | 13.1 | 13.8 | 14.5(1) | V | |
VovpspmOn | OVP detection voltage (spindle) | 14.2 | 14.9 | 15.6(1) | V | |
VovpspmOff | OVP release voltage (spindle) | 13.9 | 14.6 | 15.3(1) | V | |
VovpOn | OVP detection voltage (except spindle) | 6.0 | 6.2 | 6.4(1) | V | |
VovpOff | OVP release voltage (except spindle) | 5.8 | 6.0 | 6.2(1) | V | |
CHARGE PUMP PART | ||||||
FCHGP | Frequency | XSLEEP = 1 | 132.6 | 156 | 179.4 | kHz |
VCHGP | Output voltage | Ccp1 = Ccp3 = 0.1 µF Io = –1 mA | 15.6 | 18.5 | 21.4 | V |
SPINDLE MOTOR DRIVER PART | ||||||
RttlSPM | Total output resistance high side + low side | IOUT = 500 mA | 0.3 | 0.6 | Ω | |
VIsns | Spindle current limit reference voltage | 160 | 170 | 180 | mV | |
VIsnsP | For flash peak current detection | 179 | 194 | 209 | ||
ResSPM | Resolution | 12 | bit | |||
VoutSPM | Spindle gain | Magnification to 1.0 inputs | 12.4 | 14.0 | 15.6 | times |
WidDZSPM | Spindle dead band | Forward | 12h | 52h | 92h | |
Reverse | –92h | –52h | –12h | |||
SLED MOTOR DRIVER PART | ||||||
RttlSLD | Total output resistance high side + low side | P12V = 10.8 to 13.2 V, IO = 500 mA | 1.6 | 2.5 | Ω | |
ResSLD | Resolution | 10 | bit | |||
WidDZSLD | Input dead band | Forward | +4h | +33h | +62h | |
Reverse | –62h | –33h | –4h | |||
GnSLD | Sled current gain | P5V = 5 V, P12V = 12 V VSLED = 7FFh | 760 | 880 | 1000 | mA |
VthEdetSLD | END_DET BEMF threshold voltage | ENDDET_SLCT = 0, SLEDENDTH<1:0> = ,SLED Enable | 62 | 124 | 186 | mV |
FOCUS/TILT/TRACKING DRIVER PART | ||||||
RttlAct | Each channel total output resistance high side + low side | P5V = 4.5 V to 5.5 V, IO = 500 mA | 0.7 | 1.1 | Ω | |
ResACT | Resolution | 12 | bit | |||
VOfstACT | Each channel output offset voltage | DAC_code = 000h | –30 | 0 | 30 | mV |
GnAct | Each channel voltage gain | Magnification to 1.0 inputs | 4.7 | 6.0 | 7.6 | times |
LOAD DRIVER PART | ||||||
RttlLOD | Total output resistance high side + low side | P5V12L = 4.5 to 5.5 V, IO = 500 mA | 1.2 | 1.9 | Ω | |
P5V12L = 10.8 to 13.2 V, IO = 500 mA | ||||||
ResLOD | Resolution | 12 | bit | |||
GnLOD | Voltage gain | P5V12L = 4.5 to 5.5 V | 4.7 | 6.0 | 7.6 | V |
P5V12L = 10.8 to 13.2 V | 11.1 | 14.0 | 17.6 | |||
WidDZLOD | Dead band | Forward | 20h | |||
Reverse | –21h | |||||
LockDth | Tray lock detect threshold current | P5V12L = 5 V, TRAY_LOCKDET[2:0] = 1 | 80 | 100 | 120 | mA |
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 1 | 80 | 100 | 120 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 2 | 120 | 150 | 180 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 2 | 120 | 150 | 180 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 3 | 160 | 200 | 240 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 3 | 160 | 200 | 240 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 4 | 212 | 250 | 287 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 4 | 212 | 250 | 287 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 5 | 255 | 300 | 345 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 5 | 255 | 300 | 345 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 6 | 297 | 300 | 345 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 6 | 297 | 300 | 345 | |||
P5V12L = 5 V, TRAY_LOCKDET[2:0] = 7 | 340 | 400 | 460 | |||
P5V12L = 12 V, TRAY_LOCKDET[2:0] = 7 | 340 | 400 | 460 | |||
STEPPING MOTOR DRIVER PART | ||||||
RttlSTP | Total output resistance high side + low side | IO = 100 mA | 1.0 | 1.5 | Ω | |
ResSTP | Resolution | 8 | bit | |||
IocpSTP | Overcurrent protection level | 595 | 850 | 1148(1) | mA | |
tDlyocpSTP | OCP monitor delay time | 0.7 | 1.0 | 1.3(1) | µs | |
thlocpSTP | OCP hold time | 17 | 25 | 32(1) | ms | |
VthEdetSTP | END_DET threshold level | ENDDET_SLCT = 1, STPDENDTH<1:0> = 00, STP Enable | 19 | 39 | 59 | mV |
LDD DRIVER PART | ||||||
AV(2) | LDD current gain in digital mode VLDD = 0x7FF IUP = 00 |
LDD_MSEL:01(CD), 10(DVD) A9P5V = 7.65 to 10.45 V | 102 | 120 | 138 | mA |
LDD_MSEL:11(BD) A9P5V = 8.55 to 10.45 V | 102 | 120 | 138 | |||
LDD_MSEL:11(BD) A9P5V = 7.65 to 8.55 V | 98 | 120 | 141 | |||
AV(2) | LDD current gain in analog mode VLDDIN input voltage = 3 V IUP = 00 |
LDD_MSEL:01(CD), 10(DVD) A9P5V = 7.65 to 10.45 V | 102 | 120 | 138 | mA |
LDD_MSEL:11(BD) A9P5V = 8.55 to 10.45 V | 102 | 120 | 138 | |||
LDD_MSEL:11(BD) A9P5V = 7.65 to 8.55 V | 98 | 120 | 141 | |||
AV(2)(3) | LDD current gain by IUP setting (digital mode only) LDD_MSEL: 01(CD), 10(DVD) |
VLDD = 0x7FF, LDD_IUP = 00 | 102 | 120 | 138 | mA |
VLDD = 0, LDD_IUP = 00 | –10 | 0 | 10 | |||
VLDD = 0x7FF, LDD_IUP = 01 | 119 | 149 | 178 | |||
VLDD = 0x7FF, LDD_IUP = 10 | 141 | 177 | 212 | |||
VLDD = 0x7FF, LDD_IUP = 11 | 164 | 206 | 247 | |||
AV(2)(3) | LDD current gain by IUP setting (digital mode only) LDD_MSEL:11(BD) at A9P5V = 8.55 to 10.45 V |
VLDD = 0x7FF, LDD_IUP = 00 | 102 | 120 | 138 | mA |
VLDD = 0, LDD_IUP = 00 | –10 | 0 | 10 | |||
VLDD = 0x7FF, LDD_IUP = 01 | 119 | 149 | 178 | |||
VLDD = 0x7FF, LDD_IUP = 10 | 141 | 177 | 212 | |||
VLDD = 0x7FF, LDD_IUP = 011 | 164 | 206 | 247 | |||
AV(2)(3) | LDD current gain by IUP setting (digital mode only) LDD_MSEL:11(BD) at A9P5V = 7.65 to 8.55 V |
VLDD = 0x7FF, LDD_IUP = 00 | 98 | 120 | 141 | mA |
VLDD = 0, LDD_IUP = 00 | –10 | 0 | 10 | |||
VLDD = 0x7FF, LDD_IUP = 01 | 114 | 149 | 183 | |||
VLDD = 0x7FF, LDD_IUP = 10 | 136 | 177 | 217 | |||
VLDD = 0x7FF, LDD_IUP = 11 | 158 | 206 | 253 | |||
ResLDD | LDD current gain | P5V = 4.5 V to 5.5 V, A9P5V = 9.5 V | 11 | bit | ||
tr | Rise time of ILDD | P5V = 5 V VLDDIN = 0 → 0x7FF 120 mA |
162 | 203 | 243 | µs |
tf | Fall time of ILDD | P5V = 5 V VLDDIN = 0x7FF → 0 50 mA |
162 | 203 | 243 | |
IZ | VLDDIN input impedance | 100 | 200 | 300 | kΩ | |
LDDdbA | Low voltage dead band | 140 | 200 | 260 | mV | |
LDDdbA | 0x3F | bit | ||||
THERMOMETER PART | ||||||
ResTEMP | Resolution | 6 | bit | |||
Trng | Temperature range | CHIPTEMP[5:0] = 00 | 8 | 15 | 22 | °C |
CHIPTEMP[5:0] = 3Fh | 155 | 165 | 175 | |||
FTEMP | Update cycle | 10 | kHz | |||
ACTUATOR PROTECTION | ||||||
tintACTTEMP | Update cycle | 26 | ms | |||
SERIAL PORT VOLTAGE LEVELS | ||||||
SOMI | High-level output voltage, VOH | IOH = 1 mA | 80% SIOV | V | ||
SOMI | Low-level output voltage, VOL | IOL = 1 mA | 20% SIOV | V | ||
SIMO | High-level input voltage, VIH | 70% SIOV | V | |||
SIMO | Low-level input voltage, VIL | 20% SIOV | V | |||
tSIMO | Input rise/fall time | 20% ⇔ 80% SIOV | 3.5 | ns | ||
tSOMI | Output rise/fall time(4) | Cload = 30 pF, 20% ⇔ 80% SIOV | 10 | ns | ||
RSCLK | Internal pulldown resistance | 100 | 200 | 300 | kΩ | |
RSSZ | Internal pullup resistance | 100 | 200 | 300 | kΩ |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
ƒck | SCLK clock frequency | SIOV = 3.3 V | 35 | MHz | ||
tckl | SCLK low time | 11 | ns | |||
tckh | SCLK high time | 11 | ns | |||
tsens | SSZ setup time | 7 | ns | |||
tsenh | SSZ hold time | 7 | ns | |||
tsl | SSZ disable high time | 11 | ns | |||
tds | SIMO setup time (Write) | 7 | ns | |||
tdh | SIMO hold time (Write) | 7 | ns |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
ƒck | SCLK clock frequency | SIOV = 3.3 V | 35 | MHz | ||
tckl | SCLK low time | 11 | ns | |||
tckh | SCLK high time | 11 | ns | |||
tsens | SSZ setup time | 7 | ns | |||
tsenh | SSZ hold time | 7 | ns | |||
tsl | SSZ disable high time | 11 | ns | |||
tds | SIMO setup time (Write) | 7 | ns | |||
tdh | SIMO hold time (Write) | 7 | ns | |||
trdly | SOMI delay time (Read) | CLOAD = 10 pF, SIOV = 3.3 V | 2 | 9 | ns | |
tsendl | SOMI hold time (Read) | CLOAD = 10 pF, SIOV = 3.3 V | 2 | 9 | ns | |
trls | SOMI release time (Read) | CLOAD = 10 pF, SIOV = 3.3 V from SSZ rise to SOMI HIZ | 0 | 9 | ns |