SLIS140A October   2011  – December 2014 TPIC74101-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Rating
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switch-Mode Input/Output Pins (L1, L2)
      2. 7.3.2  Supply Pin (Vdriver)
      3. 7.3.3  Internal Supply Decoupling Pin (Vlogic)
      4. 7.3.4  Input Voltage Monitoring Pin (AIN)
      5. 7.3.5  Input Undervoltage Alarm Pin (AOUT)
      6. 7.3.6  Reset Delay Timer Pin (REST)
      7. 7.3.7  Reset Pin (RESET)
      8. 7.3.8  Main Regulator Output Pin (VOUT)
      9. 7.3.9  Low-Power-Mode Pin (CLP)
      10. 7.3.10 Switch-Output Pin (5Vg)
      11. 7.3.11 5Vg-Enable Pin (5Vg_ENABLE)
      12. 7.3.12 Slew-Rate Control Pins (SCR0, SCR1)
      13. 7.3.13 Modulator Frequency Setting (Pin Rmod)
      14. 7.3.14 Ground Pin (PGND)
      15. 7.3.15 Enable Pin (ENABLE)
      16. 7.3.16 Bootstrap Pins (Cboot1 and Cboot2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Clock Modulator
      2. 7.4.2 Buck/Boost Transitioning
      3. 7.4.3 Buck SMPS
      4. 7.4.4 Boost SMPS
      5. 7.4.5 Extension of the Input Voltage Range on V(driver)
      6. 7.4.6 Low-Power Mode
      7. 7.4.7 Temperature and Short-Circuit Protection
      8. 7.4.8 Switch Output Pin (5Vg) Current Limitation
      9. 7.4.9 Soft Start
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Mode
        2. 8.2.2.2 Boost Mode
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switch-Mode Power Supply
        1. 10.1.1.1 Inductor
        2. 10.1.1.2 Filter Capacitors
        3. 10.1.1.3 Traces and Ground Plane
      2. 10.1.2 Package and PCB Land Configuration for a Multilayer PCB
      3. 10.1.3 Multilayer (Side View)
      4. 10.1.4 Single-Layer
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device HBM ESD Classification level 1B for pin 7 (L2), pin 8 (VOUT), pin 9 (5Vg)
    • Device HBM ESD Classification 2 for pins 1–6 and 10–20
    • Device CDM ESD Classification Level C4B
  • Switch-Mode Regulator
    • 5 V ±2%, Buck Mode
    • 5 V ±3%, Low-Power or Boost or Boost/buck Crossover Mode
  • Switching Frequency, 380 kHz (typical)
  • Input Operating Range, 1.5 V to 40 V, (Vdriver)
    • 1-A Load-Current Capability
    • 200-mA Load-Current Capability Down to 2-V Input (Vdriver)
    • 120-mA Load-Current Capability Down to
      1.5-V Input (Vdriver)
  • Enable Function
  • Low-Power Operation Mode
  • Switched 5-V Regulated Output on 5Vg With Current Limit
  • Programmable Slew Rate and Frequency Modulation for EMI Consideration
  • Reset Function With Deglitch Timer and Programmable Delay
  • Alarm Function for Undervoltage Detection and Indication
  • Thermally Enhanced Package for Efficient Heat Management

2 Applications

  • Automotive Infotainment & Cluster
  • Body Electronics

3 Description

The TPIC74101-Q1 is a switch-mode regulator with integrated switches for voltage-mode control. With the aid of external components (LC combination), the device regulates the output to 5 V ±2% for a wide input-voltage range.

The TPIC74101-Q1 offers a reset function to detect and indicate when the 5-V output rail is outside of the specified tolerance. This reset delay is programmable using an external timing capacitor on the RESET Pin. Additionally, an alarm (AOUT) feature is activated when the input supply rail Vdriver is below a prescaled specified value (set by the AIN pin).

The TPIC74101-Q1 has a frequency-modulation scheme to minimize EMI. The clock modulator permits a modulation of the switching frequency to reduce interference energy in the frequency band.

The 5Vg output is a switched 5-V regulated output with internal current limiting to prevent RESET from being asserted when powering a capacitive load on the supply line. This function is controlled by the 5Vg_ENABLE Pin. If there is a short to ground on this output (5Vg output), the output self-protects by operating in a chopping mode. This does, however, increase the output ripple voltage on VOUT during this fault condition.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPIC74101-Q1 HTSSOP (20) 6.50 mm x 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

s0183-01.gif

4 Revision History

Changes from * Revision (October 2011) to A Revision

  • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go