SLVSG57
August 2021
TPS1653
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Hot Plug-In and In-Rush Current Control
8.3.1.1
Thermal Regulation Loop
8.3.2
Undervoltage Lockout (UVLO)
8.3.3
Overload and Short Circuit Protection
8.3.3.1
Overload Protection
8.3.3.2
Short Circuit Protection
8.3.3.2.1
Start-Up With Short-Circuit On Output
8.3.4
Current Monitoring Output (IMON)
8.3.5
FAULT Response (FLT)
8.3.6
Power Good Output (PGOOD)
8.3.7
IN, P_IN, OUT and GND Pins
8.3.8
Thermal Shutdown
8.3.9
Low Current Shutdown Control (SHDN)
8.3.10
Enable Input (EN)
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Programming the Current-Limit Threshold R(ILIM) Selection
9.2.2.2
Undervoltage Lockout and Overvoltage Set Point
9.2.2.3
Setting Output Voltage Ramp Time (tdVdT)
9.2.2.3.1
Support Component Selections RPGOOD and C(IN)
9.2.3
Application Curves
9.3
System Examples
9.3.1
48-V Power Amplifier Protection for Telecom Radios
10
Power Supply Recommendations
10.1
Transient Protection
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|20
MHTS001G
RGE|24
MPQF124G
Thermal pad, mechanical data (Package|Pins)
PWP|20
PPTD378
RGE|24
QFND136Y
Orderable Information
slvsg57_oa
slvsg57_pm
1
Features
4.5-V to 58-V operating voltage,
67-V absolute maximum
Integrated 58-V, 31-mΩ R
ON
Hot-Swap FET
0.6-A to 4.5-A adjustable current limit (± 7%)
IPC9592B clearance for 56-V operation (20-pin HTSSOP)
2x pulse current support for load transients
Low quiescent current, 21-µA in shutdown
Adjustable UVLO cut off with ± 2% accuracy
Adjustable output slew rate control for inrush current limiting
Charges large and unknown capacitive loads through thermal regulation during device power up
Power Good Output (PGOOD)
Selectable overcurrent fault response options between Auto-Retry and Latch Off (MODE)
Analog current monitor (IMON) output (± 6%)
Available in easy-to-use 20-pin HTSSOP and
24-pin VQFN packages