The TPS2592xx family of eFuses is a highly integrated circuit protection and power management solution in a tiny package. The devices use few external components and provide multiple protection modes. They are a robust defense against overloads, shorts circuits, voltage surges, excessive inrush current, and reverse current.
Current limit level can be set with a single external resistor. Applications with particular voltage ramp requirements can set dV/dT pin with a single capacitor to ensure proper output ramp rates.
Many systems, such as SSDs, must not allow holdup capacitance energy to dump back through the FET body diode onto a drooping or shorted input bus. The BFET pin is for such systems. An external NFET can be connected “Back to Back (B2B)” with the TPS2592 output and the gate driven by BFET to prevent current flow from load to source.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS2592ZA | VSON (10) | 3.00 mm × 3.00 mm |
TPS2592ZL |
DATE | REVISION | NOTES |
---|---|---|
December 2014 | * | Initial release |
PART NUMBER | UV | OV CLAMP | FAULT RESPONSE | STATUS |
---|---|---|---|---|
TPS2592ZA | 4.3 V | — | Auto-retry | Active |
TPS2592ZL | 4.3 V | — | Latched | Preview |
PIN | DESCRIPTION | |
---|---|---|
NAME | NUMBER | |
BFET | 9 | Connect this pin to the gate of a blocking NFET. See the Feature Description. |
dV/dT | 1 | Tie a capacitor from this pin to GND to control the ramp rate of OUT at device turn-on. |
EN/UVLO | 2 | This is a dual function control pin. When used as an ENABLE pin and pulled down, it shuts off the internal pass MOSFET and pulls BFET to GND. When pulled high, it enables the device and BFET. As an UVLO pin, it can be used to program different UVLO trip point via external resistor divider. |
GND | PowerPAD™ | GND |
ILIM | 10 | A resistor from this pin to GND will set the overload and short circuit limit. |
OUT | 6-8 | Output of the device |
VIN | 3-5 | Input supply voltage |