SLUSAR9D December   2011  – December 2021 TPS28225-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Output Active Low
      3. 7.3.3 Enable/Power Good
      4. 7.3.4 3-State Input
      5. 7.3.5 Bootstrap Diode
      6. 7.3.6 Upper and Lower Gate Drivers
      7. 7.3.7 Dead-Time Control
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching the MOSFETs
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for automotive applications
  • Drives two N-channel MOSFETs with 14-ns adaptive dead time
  • Wide gate drive voltage: 4.5 V up to 8.8 V with best efficiency at 7 V to 8 V
  • Wide power system train input voltage: 3 V up to 27 V
  • Wide input PWM signals: 2-V up to 13.2-V amplitude
  • Capable of driving MOSFETs with ≥40-A current per phase
  • High frequency operation: 14-ns propagation delay and 10-ns rise or fall time allows
    FSW up to 2 MHz
  • Capable of propagating <30-ns input PWM pulses
  • Low-side driver sink on-resistance (0.4 Ω) prevents dV/dT related shoot-through current
  • Three-state PWM input for power stage shutdown
  • Space saving enable (input) and power good (output) signals on the same pin
  • Thermal shutdown
  • UVLO protection
  • Internal bootstrap diode
  • Economical SOIC-8 and thermally enhanced
    3-mm × 3-mm VSON-8 packages
  • High performance replacement for popular
    three-state input drivers